MSC8144ADS Freescale, MSC8144ADS Datasheet - Page 50

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MSC8144ADS

Manufacturer Part Number
MSC8144ADS
Description
Manufacturer
Freescale
Datasheet

Specifications of MSC8144ADS

Lead Free Status / RoHS Status
Compliant
ADS Functional Description
below activated also when main Hard Reset is asserted. The BCSR2 fields are described below in
Table 5-11:
5.14.4 BCSR3 Board Control Register 3
On the board, the BCSR3 acts as a control register. The BCSR3, which may be read or written at
any time, receives its defaults upon Power-On-Reset. The BCSR3 fields are described below in
Table 5-12:
5-26
BIT
BIT
0
1
2
3
4
5
6
7
0
1
2
3
M3PRST
MNEMONIC
SHMOOEN
CODEC_RST
DEBUG
MNEMONIC
SGMII_RST
RGMII_RST
PRST
E1T1RST1
E1T1RST2
PHY_RST
DS3_RST
RST
Table 5-12. BCSR3 Special Function 1 (Offset 3)
Table 5-11. BCSR2 Peripheral’s Reset (Offset 2)
Power-on-Reset. Writing low will generate PORESET pulse for
MSC8144ADS to re-configure it except the M3 Reset.
M3 Power-on-Reset. Writing low will generate RESET pulse for the
MSC8144 M3 Memory and main PORESET for the whole board..
Debug Request. A low value for this bit causes the MSC8144 to enter
debug mode by driving “1” to EE0 input. When this bit is high the chip
starts running after reset negation.
Clock Synthesizer Enable. Low enables clock synthesizer for
SCHMOO purpose. When high the synthesizer enters in power-down
mode.
Reset to DS3 Framer. Low provides reset to DS3 Framer.
Normal operation is available when high.
Reset to SGMII Switch. Low provides reset to SGMII Switch.
Normal operation is available when high.
Reset to RGMII Switch. Low provides reset to RGMII Switch.
Normal operation is available when high.
Reset to GETH Phy. Low provides reset to GETH Phy. Normal
operation is available when high.
Reset to E1T1 Framer 1. Low provides reset to E1T1 Framer 1.
Normal operation is available when high.
Reset to E1T1 Framer 2. Low provides reset to E1T1 Framer 2.
Normal operation is available when high.
Reset to CODEC. Low provides reset to CODEC. Normal
operation is available when high.
Reset Signal. Writing low asserts reset to an expansion PTMC
card. If the bit is set to high the reset signal is negated. This bit
also indicates MSC8144 reset status. The bit remains low until
the MSC8144 configuration sequence is completed.
MSC8144ADS MSC8144, Rev. 0
Function
Function
Freescale Semiconductor
HRST level
when read
DEF on
DEF on
‘1’ after
‘1’ after
SW2.4
PRST
PRST
reset
reset
1,
0
1
1
1
1
1
1
1
ATT.
ATT.
R,W
R,W
R,W
R,W
R,W
R,W
R,W
R,W
R,W
R,W
R,W
R,W