MSC8144ADS Freescale, MSC8144ADS Datasheet - Page 34

no-image

MSC8144ADS

Manufacturer Part Number
MSC8144ADS
Description
Manufacturer
Freescale
Datasheet

Specifications of MSC8144ADS

Lead Free Status / RoHS Status
Compliant
ADS Functional Description
5.7.5 Power Manager
The power manager is the Power-One ZM7108 controller, and this device stores all power
system parameters. Access to it is available from a shared I
host MPC8560 or from the MSC8144. Updated values for this controller may be programmed in
internal non-volatile memory.
5.8 SPI Bus
There are two SPI master devices (MPC8560 and MSC8144) and four slave devices (two
DS26521 E1/T1 Framers, a 7380 RGMII switch, and an ICS30703 Clock Synthesizer). Serial
Flash memory is accessed from MSC8144 only. The SPI bus connection is shown in Figure 5-7.
Four GPIO pins (GPIO18,GPIO16,GPIO1,GPIO0) enable selecting the different SPI bus parts. The
coding for this is shown in Table 5-5. This feature requires a disable signal on the SPI Select lines driving
from the Host (
in the OFF position.
5-10
MPC8560
(GPOUTDR[15])PCI_AD40
(GPOUTDR[14])PCI_AD41
(GPOUTDR[13])PCI_AD42
(GPOUTDR[12])PCI_AD43
(GPOUTDR[8])PCI_AD47
DS26521
SPI_SEL
SPI_MOSI
SPI_MISO
DS26521
VCC
SPI_CLK
MPC8560(host)
). This may be achieved while the Host stays in reset with DIP-switch SW2[1]
CS
CS
SPI_CLK
SPIMISO
SPIMOSI
SPI_SEL
Figure 5-7. SPI Bus Devices
MSC8144ADS MSC8144, Rev. 0
MOSI,MISO,CLK
PU
PU
PU
PU
PU
PU
PU
PU
PU
ICS30703
SCLK
DIN
CS
SPI Flash
2
C bus and can be provided from the
SPI_SEL
SPI_CLK
GPIO18,1,16,0
SPIMISO
SPIMOSI
SI_nEN
MSC8144
SI_CLK
SI_DI
SI_DO
FPGA
VSC7380
Freescale Semiconductor