RAM5006E-016 Emerson Network Power, RAM5006E-016 Datasheet - Page 95

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RAM5006E-016

Manufacturer Part Number
RAM5006E-016
Description
Manufacturer
Emerson Network Power
Datasheet

Specifications of RAM5006E-016

Lead Free Status / RoHS Status
Compliant
Programming Considerations
PCI Arbitration
The Universe PCI/VME bus bridge ASIC includes a user-programmable map decoder for the
VMEbus-to-local-bus interface. The address translation capabilities of the Universe enable the
processor to access any range of addresses on the VMEbus.
Recommendations for VMEbus mapping, including suggested CHRP- and PREP-compatible
memory maps, can be found in the MVME5100-Series Single Board Computer Programmer’s
Reference Guide.
VMEbus master.
Good programming practice dictates that only one MPU at a time have control of the
MVME5100 control registers. Of particular note are:
There are seven potential PCI bus masters on the MVME5100:
The Winbond W83C554 PIB device supplies the PCI arbitration support for these seven types
of devices. The PIB supports flexible arbitration modes of fixed priority, rotating priority and
mixed priority, as appropriate in a given application. Details on PCI arbitration can be found in
the MVME5100-Series Single Board Computer Programmer’s Reference Guide.
Registers that modify the address map
Registers that require two cycles to access
VMEbus interrupt request registers
Hawk ASIC (MPU/PCI bus bridge controller)
Winbond W83C554 PIB (PCI/ISA bus bridge controller)
DECchip 21143 Ethernet controller
Universe II ASIC (PCI/VME bus bridge controller)
PMC Slot 1 (PCI mezzanine card)
PMC Slot 2 (PCI mezzanine card)
PCI Expansion Slot
MVME51005E Single Board Computer Installation and Use (6806800A38B)
Figure 7-1
shows the overall mapping approach from the standpoint of a
7 Programming the MVME5100
77