TTSV04622V2-DB LSI, TTSV04622V2-DB Datasheet - Page 19

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TTSV04622V2-DB

Manufacturer Part Number
TTSV04622V2-DB
Description
Manufacturer
LSI
Datasheet

Specifications of TTSV04622V2-DB

Number Of Transceivers
1
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Not Compliant
May 2001
Agere Systems Inc.
Pin Information
Table 3. Pin Descriptions—Receive Interface
Note: The speed for each channel below is 622.08 Mbits/s.
* I = input, LVDS = low-voltage differential signal.
D19
C18
C16
C14
C12
A10
B10
A11
B11
E13
F13
A12
B12
E14
F14
A13
B13
E15
F15
A14
B14
E16
F16
A15
B15
A16
B16
E17
F17
A17
B17
E18
F18
A18
B18
E19
Pin
D_IN0_00_N
D_IN0_01_N
D_IN0_02_N
D_IN0_03_N
D_IN0_04_N
D_IN0_05_N
D_IN0_06_N
D_IN0_07_N
D_IN0_08_N
D_IN0_09_N
D_IN0_10_N
D_IN0_12_N
D_IN0_13_N
D_IN0_14_N
D_IN0_15_N
D_IN0_11_N
D_IN0_00
D_IN0_01
D_IN0_02
D_IN0_03
D_IN0_04
D_IN0_05
D_IN0_06
D_IN0_07
D_IN0_08
D_IN0_09
D_IN0_10
D_IN0_12
D_IN0_13
D_IN0_14
D_IN0_15
D_IN0_11
CTAP0_3
CTAP0_2
CTAP0_1
CTAP0_0
Symbol
(continued)
Type
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
*
Port 0 Input 0. LVDS data input pair for port 0, channel 0.
Port 0 Input 1. LVDS data input pair for port 0, channel 1.
Port 0 Input 2. LVDS data input pair for port 0, channel 2.
Port 0 Input 3. LVDS data input pair for port 0, channel 3.
Port 0 Input 4. LVDS data input pair for port 0, channel 4.
Port 0 Input 5. LVDS data input pair for port 0, channel 5.
Port 0 Input 6. LVDS data input pair for port 0, channel 6.
Port 0 Input 7. LVDS data input pair for port 0, channel 7.
Port 0 Input 8. LVDS data input pair for port 0, channel 8.
Port 0 Input 9. LVDS data input pair for port 0, channel 9.
Port 0 Input 10. LVDS data input pair for port 0, channel 10.
Port 0 Input 11. LVDS data input pair for port 0, channel 11.
Port 0 Input 12. LVDS data input pair for port 0, channel 12.
Port 0 Input 13. LVDS data input pair for port 0, channel 13.
Port 0 Input 14. LVDS data input pair for port 0, channel 14.
Port 0 Input 15. LVDS data input pair for port 0, channel 15.
Center Taps for Port 0 Inputs. Provides center-tapped common-mode
termination. These inputs should be terminated through individual external
0.01 µF capacitors to ground.
Name/Description
10 Gbits/s APS Port and TSI
19

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