TTSV04622V2-DB LSI, TTSV04622V2-DB Datasheet - Page 69
TTSV04622V2-DB
Manufacturer Part Number
TTSV04622V2-DB
Description
Manufacturer
LSI
Datasheet
1.TTSV04622V2-DB.pdf
(86 pages)
Specifications of TTSV04622V2-DB
Number Of Transceivers
1
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Not Compliant
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May 2001
Agere Systems Inc.
Register Descriptions
Channel-Level Registers
Table 64. Channel Path Switch Control (R/W)
Table 65. Channel Path Switch Readback (RO)
Table 66. Channel AIS-P Insert (R/W)
Table 67. Channel UNEQ-P Insert (R/W)
Table 68. Extracted Line Status (E2) (RO)
Table 69. Line Error Counts (RO)
Note:Note that the counts are latched by changing the CNTFRZ bit from 0 to 1. This is like a PM register, but instead of a PM_CLK, the
Address
Address
Address
Address
Address
Address
P+200
P+200
P+200
P+200
P+200
P+200
(Hex)
(Hex)
(Hex)
(Hex)
(Hex)
(Hex)
C+10
C+10
C+10
030A
C+10
030B
C+10
030C
C+10
0307
0308
0309
ALMFRZ bit is used.
11—0
11—0
11—0
11—0
15—8
7—0
7—0
Bit
Bit
Bit
Bit
Bit
Bit
WP[11:0]
WPRDBK[15:0]
AISINS[11:0]
UNEQINS[11:0]
EXTRE2
FRMERRCNT
B1ERRCNT
(continued)
(continued)
Name
Name
Name
Name
Name
Name
Preselect time slot [11:0] to protect configuration:
0 = working/C.
1 = protect/D.
Read back active configuration for time slot [11:0]:
0 = working/C.
1 = protect/D.
Insert AIS-P in time slot [11:0].
Insert UNEQ-P in time slot [11:0].
Extracted E2 byte.
Framing (A1/A2) error count.
B1 BIP error count.
Description
Description
Description
Description
Description
Description
10 Gbits/s APS Port and TSI
Reset
Reset
Reset
Reset
Reset
Reset
0
0
0
0
0
0
0
69
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