TTSV04622V2-DB LSI, TTSV04622V2-DB Datasheet - Page 79

• Manufacturer Part Number: TTSV04622V2-DB
• Manufacturer: LSI

Specifications of TTSV04622V2-DB

• Number Of Transceivers: 1
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Not Compliant

May 2001
Agere Systems Inc.
Timing Characteristics
Microprocessor Interface Timing
Table 86. TA_N/TEA_N Cycle Termination for Synchronous Read Cycle
TA_N
0
0
1
1
ADDRESS_[12:0]
TA_N/TEA_N
PARITY_[1:0]
DATA_[15:0]/
(OUTPUT)
TEA_N
RW_N
CS_N
PCLK
TS_N
0
1
0
1
Figure 21. M860 Synchronous Read Cycle (MPMODE = 10 or 11)
Not possible during read cycle.
Normal cycle termination.
Access to undefined address region—transfer error.
No cycle termination—processor-generated time out.
HIGH Z
(continued)
t1
(continued)
tcycle_
t2
Encoding Description
M860
t4
WAIT-STATES
INSERTED
t8
t5
t3
t6
10 Gbits/s APS Port and TSI
t9
HIGH Z
t7
0584r.3(F)
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