TTSV04622V2-DB LSI, TTSV04622V2-DB Datasheet - Page 43

• Manufacturer Part Number: TTSV04622V2-DB
• Manufacturer: LSI

Specifications of TTSV04622V2-DB

• Number Of Transceivers: 1
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Not Compliant

May 2001
Functional Description
Receiver Block
LVDS Serial-to-Parallel Converter
Each CDR incorporates a PLL, which is locked onto the
system clock. The PLL multiplies the 77.76 MHz sys-
tem clock to a 622 MHz clock, which is used to provide
LVDS clock recovery modules with 16 phase-shifted
clocks (100 ps resolution). Each channel is able to
recover the 622 MHz clock associated with its LVDS
input and captures the incoming STS-12 data stream.
If an LVDS input is unconnected (floating), the LVDS
clock recovery continues to provide a valid clock for
downstream logic: internal logic timing is not violated
and logic does not lock up. In such a case, loss of fram-
ing occurs. The framer also goes back to the in-frame
Notes:
Row, column, and STS counters are only set/reset by state transition from LOF to frame confirm.
The confirmed A1/A2 pattern means that row/col/STS counter values indicate time for the last (12th) A1 byte.
Agere Systems Inc.
(continued)
PATTERN A1/A2
CONFIRMED
(continued)
CONFIRM
FRAME
Figure 7. Framer State Machine
PATTERN A1/A2
CONFIRMED
NOT CONFIRMED
PATTERN A1/A2
state when LVDS input is back (assuming good data).
No reset is needed.
SONET Frame Recovery
The SONET framer detects the position of the SONET
frame and generates a frame pulse (FP) signal to mark
the position of byte A1 in STS-1 #1.
The framer is not a fully SONET-compliant framer.
Instead, it is a simple four-state machine: two consecu-
tive errored frames bring the state machine from in-
frame state to LOF (loss of framing) state, while two
consecutive frames with aligned A1/A2 transitions
bring the state machine from LOF to in-frame state.
Figure 7 shows the framer state machine. The framer
is completely autonomous.
LOF
FRAME
IN
TWO CONSECUTIVE
PATTERNS A1/A2
NOT CONFIRMED
PATTERN A1/A2
CONFIRMED
RESET
10 Gbits/s APS Port and TSI
5-9876r.1(F)
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