LAN9217-MT Standard Microsystems (SMSC), LAN9217-MT Datasheet - Page 10
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LAN9217-MT
Manufacturer Part Number
LAN9217-MT
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LAN9217-MT.pdf
(139 pages)
Specifications of LAN9217-MT
Operating Supply Voltage (typ)
3.3V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Lead Free Status / RoHS Status
Compliant
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Revision 2.7 (03-15-10)
1.1
1.2
Microprocessor/
Microcontroller
The SMSC LAN9217 integrated 10/100 MAC/PHY controller is a peripheral chip that performs the
function of translating parallel data from a host controller into Ethernet packets. The LAN9217 Ethernet
MAC/PHY controller is designed and optimized to function in an embedded environment. All
communication is performed with programmed I/O transactions using the simple SRAM-like host
interface bus.
The diagram shown above, describes a typical system configuration of the LAN9217 in a typical
embedded environment.
The LAN9217 is a general purpose, platform independent, Ethernet controller. The LAN9217 consists
of four major functional blocks. The four blocks are:
The LAN9217 is driver-, register-, and footprint-compatible with previous generation LAN9118 Family
devices. Drivers written for these products will work with the LAN9217. However, in order to support
HP Auto-MDIX, other components such as the magnetics and the passive components around the
magnetics need to change, and supporting these changes does require a minor PCB change. A
reference design for the LAN9217 will be available on SMSC’s website.
Block Diagram
Compatibility with First-generation LAN9118 Family Devices
10/100 Ethernet PHY
10/100 Ethernet MAC
RX/TX FIFOs
Host Bus Interface (HBI)
System Bus
Figure 1.1 System Block Diagram
DATASHEET
System Memory
LAN9217
25MHz
XTAL
Peripherals
System
16-bit High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX Support
10
EEPROM
(Optional)
MII
Magnetics
LEDS/GPIO
External
Optional
PHY
Magnetics
Optional
Ethernet
SMSC LAN9217
Datasheet
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