LAN9217-MT Standard Microsystems (SMSC), LAN9217-MT Datasheet - Page 20
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LAN9217-MT
Manufacturer Part Number
LAN9217-MT
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LAN9217-MT.pdf
(139 pages)
Specifications of LAN9217-MT
Operating Supply Voltage (typ)
3.3V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Lead Free Status / RoHS Status
Compliant
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Revision 2.7 (03-15-10)
Management Data
Management Data
IO/External PHY
NAME
Detect
Clock
Note 2.2
Note 2.3
(EXT_PHY_DET)
Pins RXD[3:1] provide internal pull-down resistors to prevent these pins from floating when
unused. RXD0 (pin 75) does not provide an internal pull-down resistor. This pin must be
pulled or driven to a valid state at all times.
The external SMI port is selected when SMI_SEL = 1. When SMI_SEL = 0, MDIO is tri-
stated and MDC is driven low.
SYMBOL
MDIO
MDC
Table 2.6 MII Interface Signals
BUFFER
TYPE
(PD)
(PD)
I/O8
O8
DATASHEET
16-bit High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX Support
20
NUM
PINS
1
1
Management Data IO: When SMI_SEL = 1,
this pin is the MII SMI serial IO bus pin.
External PHY Detect: This pin also functions
as a strap input, which can be used to indicate
the presence of an external PHY.
Note:
Management Data Clock: When SMI_SEL = 1,
this pin is the MII management data clock.
When SMI_SEL=0, this pin is driven low.
Note:
See
"HW_CFG—Hardware Configuration
Register"
SMI_SEL and EXT_PHY_DET
See
"HW_CFG—Hardware Configuration
Register"
SMI_SEL.
Section 5.3.9,
Section 5.3.9,
DESCRIPTION
for more information on
for more information on
SMSC LAN9217
Datasheet
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