PEF81902FV1.1 Lantiq, PEF81902FV1.1 Datasheet - Page 127

• Manufacturer Part Number: PEF81902FV1.1
• Manufacturer: Lantiq

Specifications of PEF81902FV1.1

• Lead Free Status / RoHS Status: Supplier Unconfirmed

•
Figure 51
2.6.8
The T-SMINT
Digital loop via TLP (Test Loop, TMH register) command bit
the HDLC controller is still connected to IOM
path. All incoming data from the IOM
functionality excluding layer 1 (U-transceiver (loopback between XFIFO and RFIFO).
•
Figure 52
Data Sheet
Test Function
â
Interrupt Status Registers of the HDLC Controller
Layer 2 Test Loops
IX provides test and diagnostic functions for the HDLC controller:
TMH:TLP = 0
MASK
HDLC
WOV
MOS
CIC
TIN
INT
ST
S
HDLC
U
HDLC
ISTA
WOV
MOS
CIC
TIN
ST
S
U
â
-2 is ignored. This is used for testing HDLC
113
â
-2 but it is internally connected with the RX
MASKH
RME
XMR
RFO
XDU
XPR
RPF
TMH:TLP = 1
HDLC
(Figure
ISTAH
RFO
RME
RPF
XPR
XMR
Functional Description
XDU
macro_8
52): The TX path of
PEF 81902
2001-11-12