PEF81902FV1.1 Lantiq, PEF81902FV1.1 Datasheet - Page 204

• Manufacturer Part Number: PEF81902FV1.1
• Manufacturer: Lantiq

Specifications of PEF81902FV1.1

• Lead Free Status / RoHS Status: Supplier Unconfirmed

MRE
MRC
MIE
MXC
4.8.5
MSTA
Value after reset: 00
MAC
Data Sheet
7
0
MONITOR Receive Interrupt Enable
0 =
1 =
MR Bit Control
Determines the value of the MR bit:
0 =
1 =
MONITOR Interrupt Enable
0 =
1 =
MX Bit Control
Determines the value of the MX bit:
0 =
1 =
MSTA - MONITOR Status Register
MONITOR Transmit Channel Active
0 =
0
MONITOR interrupt status MDR generation is masked.
MONITOR interrupt status MDR generation is enabled.
MR is always ‘1’. In addition, the MDR interrupt is blocked, except
for the first byte of a packet (if MRE = 1).
MR is internally controlled by the T-SMINT
MONITOR channel protocol. In addition, the MDR interrupt is
enabled for all received bytes according to the MONITOR channel
protocol (if MRE = 1).
MONITOR interrupt status MER, MDA, MAB generation is masked
MONITOR interrupt status MER, MDA, MAB generation is enabled
The MX bit is always ‘1’.
The MX bit is internally controlled by the T-SMINT
MONITOR channel protocol.
No data transmission in the MONITOR channel
H
0
0
read
190
0
MAC
â
IX according to
Register Description
â
Address:
IX according to
0
PEF 81902
2001-11-12
TOUT
0
5F
H