PEF81902FV1.1 Lantiq, PEF81902FV1.1 Datasheet - Page 67

• Manufacturer Part Number: PEF81902FV1.1
• Manufacturer: Lantiq

Specifications of PEF81902FV1.1

• Lead Free Status / RoHS Status: Supplier Unconfirmed

2.3.5.3
The availability of the DU D channel is indicated in bit 5 "Stop/Go" (S/G) of the last octet
in DD channel 2
MODEH.DIM2-0=0x1.
S/G = 1 : stop
S/G = 0 : go
The Stop/Go bit is available to other layer-2 devices connected to the IOM
to determine if they can access the D channel in upstream direction.
•
Figure 28
2.3.5.4
In intelligent NT applications (selected via register S_MODE.MODE2-0) the T-
SMINT
on the IOM
The S-transceiver incorporates an elaborate state machine for D-channel priority
handling on IOM
arbitration mechanism as on the S interface (writing D-bits, reading back E-bits) is
performed for all D-channel sources on IOM
guaranteed for all D-channel sources on both the S interface and the IOM
The access to the upstream D-channel is handled via the S/G bit for the HDLC
controllers and via E-bit for all connected terminals on S (E-bits are inverted to block the
terminals on S). Furthermore, if more than one HDLC source is requesting D-channel
access on IOM
The arbiter permanently counts the “1s” in the upstream D-channel on IOM
necessary number of “1s” is counted and an HDLC controller on IOM
upstream D-channel access (BAC bit is set to 0), the arbiter allows this D-channel
controller immediate access and blocks other TEs on S (E-bits are inverted). Similar as
on the S-interface the priority for D-channel access on IOM
10 (S_CMD.DPRIO).
Data Sheet
DD
â
IX has to share the upstream D-channel with one or more D-channel controllers
â
Stop/Go Bit Handling
D-Channel Arbitration
B1
-2 interface and with all connected TEs on the S interface.
Structure of Last Octet of Ch2 on DD
â
-2 the TIC bus mechanism is used (see
(Figure
â
B2
-2
(Chapter
MON
0
28). The arbitration mechanism must be activated by setting
D CI0
2.3.5.5). For the access to the D-channel a similar
MR
MX
IC1
Stop/Go
IC2
53
â
-2. Due to this an equal and fair access is
S/G A/B
MON1
CI1
Available/Blocked
Chapter
â
MR
MX
-2 can be configured to 8 or
Functional Description
2.3.5.2).
â
â
S/G
â
PEF 81902
-2 interface.
-2 requests
-2 interface
ITD09693.vsd
2001-11-12
â
-2. If the
A/B