LULXT9785MBC.D0S L7WN Intel, LULXT9785MBC.D0S L7WN Datasheet - Page 16

• Manufacturer Part Number: LULXT9785MBC.D0S L7WN
• Manufacturer: Intel

Specifications of LULXT9785MBC.D0S L7WN

• Lead Free Status / RoHS Status: Compliant

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Contents
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1
Description
Modified Table 69 “Port Configuration Register (Address 16, Hex 10)” (Bits 16.5 and 16.6)
Modified Table 71 “Interrupt Enable Register (Address 18, Hex 12)”
Added product ordering table and diagram.
Description
Modified and added new language to front page.
Reset: Modified language in first paragraph.
Added new section on DTE discovery.
Supported JTAG Instructions table: replaced long hit streams with hex.
LED Circuit: Modified paragraph language.
LED Circuit diagram: Modified diagram.
Replaced Typical Fiber Interface diagram.
Required Clock Characteristics table: Replaced SMII Input frequency and RMII Input frequency
symbol with “f”.
Auto-Negotiation and Fast Link Pulse Timing Parameters: FLP burst width under Typ = 2.
Control Register table: Modified table and table notes.
PHY Identification Register 2 (Address 3): Modified table.
PHY Identifier Bit Mapping: Modified diagram.
Auto-Negotiation Expansion: Modified table and table notes.
Port Configuration Register table: Modified table and table notes.
Trim Enable Register: Modified table (DTE Discovery).
Modified Register Bit Map table.
Revision Date: January 2002
Revision Date: April 2001
Revision Number: 005
Revision Number: 003
(Sheet 2 of 2)
Revision Date: 30-May-2006
Document Number: 249241
Revision Number: 010
Datasheet