LULXT9785MBC.D0S L7WN Intel, LULXT9785MBC.D0S L7WN Datasheet - Page 4
LULXT9785MBC.D0S L7WN
Manufacturer Part Number
LULXT9785MBC.D0S L7WN
Description
Manufacturer
Intel
Datasheet
1.LULXT9785MBC.D0S_L7WN.pdf
(234 pages)
Specifications of LULXT9785MBC.D0S L7WN
Lead Free Status / RoHS Status
Compliant
- Current page: 4 of 234
- Download datasheet (5Mb)
4
Contents
4.4
4.5
4.6
4.7
4.8
4.9
4.3.7
4.3.8
4.3.9
4.3.10 Global Hardware Control Interface ...................................................................... 123
4.3.11 FIFO Initial Fill Values.......................................................................................... 123
Operating Requirements................................................................................................... 124
4.4.1
4.4.2
Initialization ....................................................................................................................... 125
4.5.1
4.5.2
4.5.3
4.5.4
4.5.5
Link Establishment............................................................................................................ 128
4.6.1
Serial MII Operation.......................................................................................................... 130
4.7.1
4.7.2
4.7.3
4.7.4
4.7.5
4.7.6
RMII Operation ................................................................................................................. 140
4.8.1
4.8.2
4.8.3
4.8.4
4.8.5
4.8.6
100 Mbps Operation ......................................................................................................... 144
MDIO Management Interface .............................................................................. 120
MII Sectionalization.............................................................................................. 122
MII Interrupts........................................................................................................ 122
Power Requirements ........................................................................................... 124
Clock/SYNC Requirements ................................................................................. 124
4.4.2.1
4.4.2.2
4.4.2.3
4.4.2.4
4.4.2.5
MDIO Control Mode............................................................................................. 125
Hardware Control Mode....................................................................................... 125
Power-Down Mode .............................................................................................. 126
4.5.3.1
4.5.3.2
Reset ................................................................................................................... 127
Hardware Configuration Settings......................................................................... 128
Auto-Negotiation .................................................................................................. 128
4.6.1.1
4.6.1.2
4.6.1.3
4.6.1.4
4.6.1.5
4.6.1.6
SMII Reference Clock.......................................................................................... 134
TxSYNC Pulse (SMII/SS-SMII)............................................................................ 134
Transmit Data Stream.......................................................................................... 134
4.7.3.1
4.7.3.2
Receive Data Stream........................................................................................... 135
4.7.4.1
4.7.4.2
4.7.4.3
4.7.4.4
Collision ............................................................................................................... 135
Source Synchronous-Serial Media Independent Interface .................................. 136
RMII Reference Clock.......................................................................................... 140
Transmit Enable................................................................................................... 141
Carrier Sense & Data Valid.................................................................................. 141
Receive Error....................................................................................................... 141
Out-of-Band Signaling ......................................................................................... 141
4B/5B Coding Operations .................................................................................... 141
Reference Clock .................................................................................. 124
TxCLK Signal (SS-SMII only)............................................................... 124
TxSYNC Signal (SMII/SS-SMII)........................................................... 124
RxSYNC Signal (SS-SMII only) ........................................................... 124
RxCLK Signal (SS-SMII Only) ............................................................. 125
Global (Hardware) Power Down .......................................................... 127
Port (Software) Power Down ............................................................... 127
Base Page Exchange .......................................................................... 128
Manual Next Page Exchange .............................................................. 129
Controlling Auto-Negotiation ................................................................ 129
Link Criteria.......................................................................................... 129
Parallel Detection................................................................................. 129
Reliable Link Establishment While Auto MDI/MDIX is Enabled in Forced
Speed Mode130
Transmit Enable................................................................................... 134
Transmit Error ...................................................................................... 134
Carrier Sense....................................................................................... 135
Receive Data Valid .............................................................................. 135
Receive Error ....................................................................................... 135
Receive Status Encoding..................................................................... 135
Revision Date: 30-May-2006
Document Number: 249241
Revision Number: 010
Datasheet
Related parts for LULXT9785MBC.D0S L7WN
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
Microprocessor: Intel Celeron M Processor 320 and Ultra Low Voltage Intel Celeron M Processor at 600MHz
Manufacturer:
Intel Corporation
Part Number:
Description:
Intel 82550 Fast Ethernet Multifunction PCI/CardBus Controller
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
Intel StrataFlash memory 32 Mbit. Access speed 120 ns
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
Intel StrataFlash memory 32 Mbit. Access speed 120 ns
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
Intel StrataFlash memory 64 Mbit. Access speed 150 ns
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
Intel StrataFlash memory 32 Mbit. Access speed 100 ns
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
DA28F640J5A-1505 Volt Intel StrataFlash Memory
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
5 Volt Intel StrataFlash?? Memory
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
5 Volt Intel StrataFlash?? Memory
Manufacturer:
Intel Corporation
Part Number:
Description:
Intel 6300ESB I/O Controller Hub
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
Intel 82801DB I/O Controller Hub (ICH4), Pb-Free SLI
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
Intel 82801FB I/O Controller Hub (ICH6)
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
Intel Strataflash Memory28F128J3 28F640J3 28F320J3
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
Controllers, Intel 430TX PCIset: 82439TX System Controller (MTXC)
Manufacturer:
Intel Corporation