ISP1109BS,118 NXP Semiconductors, ISP1109BS,118 Datasheet - Page 9

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ISP1109BS,118

Manufacturer Part Number
ISP1109BS,118
Description
RF Transceiver USB FS TRANSCVR
Manufacturer
NXP Semiconductors
Datasheet

Specifications of ISP1109BS,118

Number Of Transceivers
1
Esd Protection
YeskV
Power Supply Requirement
Triple
Operating Supply Voltage (typ)
Not RequiredV
Operating Temperature Classification
Industrial
Operating Supply Voltage (max)
Not RequiredV
Operating Supply Voltage (min)
Not RequiredV
Pin Count
32
Mounting
Surface Mount
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Supply Voltage
1.65 V to 5.25 V
Lead Free Status / RoHS Status
Compliant
Other names
935276024118 ISP1109BS-T
Philips Semiconductors
7. Functional description
9397 750 13355
Product data sheet
7.1 Serial controller
7.2 V
7.3 ID detector
The serial controller includes the following functions:
The serial controller acts as an SPI slave or I
All the registers are the same as that in SPI or I
registers are accessed in 8-bit width (bits 0 to 7) for each address. In SPI mode, there are
25 bits for each address, only bits 0 to 7 are useful while bits 8 to 24 are don’t cares.
At hardware reset including power-on reset, the level on pin SPI_I2C_SEL will determine
whether the SPI or I
selected. If SPI_I2C_SEL = HIGH, the I
The V
session valid comparator threshold voltage (V
bit VBUS_DET of the Interrupt Source register. If V
stored.
In normal power mode, that is, when both V
senses the condition of the ID line and can differentiate between the following three
conditions:
The recommended procedure to detect the status of ID using software is:
1. When nothing is connected, ID is in the ID_FLOAT state. Enable the ID_FLOAT
2. If an interrupt occurs, read the Interrupt Latch register. If ID changes, bit ID_FLOAT is
3. The software waits for sometime, for example: 100 ms, to allow mechanical
4. The software reads the Interrupt Source register, and checks bits ID_FLOAT and
BUS
Serial Controller interface (SPI or I
Device Identification registers
Control registers
Interrupt registers
Interrupt generator.
ID pin is floating (bit ID_FLOAT = 1)
ID pin is shorted to ground (bit ID_GND = 1)
ID pin is connected to ground through resistor R
are logic 0).
interrupt (falling edge).
set.
debounce.
ID_GND.
BUS
detector
detector provides voltage level detection on V
2
C-bus interface is active. If SPI_I2C_SEL = LOW, the SPI interface is
Rev. 01 — 14 July 2005
2
C-bus)
2
C-bus interface is selected.
CC
2
th(svc)
C-bus slave.
and V
2
C-bus mode. In I
), logic 1 will be stored in
BUS
USB transceiver with carkit support
DN(ID)
CC(I/O)
is below V
BUS
(bits ID_FLOAT and ID_GND
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
. If V
are present, the ID detector
BUS
2
th(svc)
C-bus mode, the
is above the V
, logic 0 will be
ISP1109
BUS
8 of 59

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