SAA7105E/V1/G NXP Semiconductors, SAA7105E/V1/G Datasheet - Page 33

• Manufacturer Part Number: SAA7105E/V1/G
• Description: Video ICs PC-DENC
• Manufacturer: NXP Semiconductors

Specifications of SAA7105E/V1/G

• Adc/dac Resolution: 10b
• Screening Level: Commercial
• Package Type: LBGA
• Pin Count: 156
• Lead Free Status / RoHS Status: Compliant
• Other names: SAA7105E/V1/G,557

Philips Semiconductors
SAA7104E_SAA7105E_2
Product data sheet
8.3 Slave receiver
Table 20:
[1]
[2]
Table 21:
Legend: * = default value after reset.
Code
S
Sr
1000 100X
A
Am
SUBADDRESS
DATA
--------
P
RAM ADDRESS
Bit
7 to 4 -
3 to 0 DACF[3:0] R/W
X is the read/write control bit; X = logic 0 is order to write; X = logic 1 is order to read.
If more than 1 byte of DATA is transmitted, then auto-increment of the subaddress is performed.
Symbol
[1]
Explanations of
Common DAC adjust fine register, subaddress 16h, bit description
[2]
Access Value Description
R/W
Rev. 02 — 23 December 2005
Description
START condition
repeated START condition
slave address
acknowledge generated by the slave
acknowledge generated by the master
subaddress byte
data byte
continued data bytes and acknowledges
STOP condition
start address for RAM access
0
0111
0110
0101
0100
0011
0010
0001
0000* 0 %
1000
1001
1010
1011
1100
1101
1110
1111
Figure 4
must be programmed with logic 0 to ensure compatibility to
future enhancements
DAC fine output voltage adjustment, 1 % steps for all DACs
7 %
6 %
5 %
4 %
3 %
2 %
1 %
0 %
1 %
2 %
3 %
4 %
5 %
6 %
7 %
and
Figure 5
SAA7104E; SAA7105E
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Digital video encoder
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