W83628AG Nuvoton Technology Corporation of America, W83628AG Datasheet - Page 17

• Manufacturer Part Number: W83628AG
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83628AG

• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Operating Temperature (max): 70C
• Rad Hardened: No
• Lead Free Status / RoHS Status: Compliant

8.1.1 PCI Interface, contiuned
FRAME#
IDSEL
STOP#
IRDY#
TRDY#
DEVSEL#
SERR#
PAR
PCIRST#
SYMBOL
PIN
40
29
39
41
42
43
45
49
71
I/O 18tp3
I/O 10tp3
I/O 10tp3
I/O 10tp3
I/O 10tp3
I/O 10tp3
OD 10
IN ts
IN ts
I/O
Frame Signal. FRAME# is driven by the current
PCI bus master to indicate the beginning and
duration of an access.
Initialization Device Select. IDSEL is used as a
chip select during configuration read and write
transactions. This signal should be externally tied to
one of the upper 21 address signals.
Bus Stop#. STOP# indicates the current target is
requesting the master to stop the current PCI bus
transaction.
Initiator Ready. IRDY# indicates the initiating
agent’s ability to complete the current data phase of
the PCI bus transaction.
Target Ready. TRDY# indicates the target agent’s
ability to complete the current data phase of the
PCI bus transaction.
Device Select. The W83628AG drives DEVSEL#
to indicate that it is the target of the current PCI bus
transaction. The W83628AG uses subtractive
decoding and the NOGO protocol to claim PCI
transactions.
System Error. SERR# can be pulsed active by any
PCI agent that detects a system error condition.
Parity Signal. The W83628AG generates even
parity across AD[31:0] and C/BE[3:0]#.
PCI Reset. The W83628AG receives PCIRST# as
a reset from the PCI Bus.
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W83628AG & W83629AG
FUNCTION
Publication Release Date: January, 2008
Revision 1.2
LEVEL
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V