W83628AG Nuvoton Technology Corporation of America, W83628AG Datasheet - Page 29

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W83628AG

Manufacturer Part Number
W83628AG
Description
Manufacturer
Nuvoton Technology Corporation of America
Datasheet

Specifications of W83628AG

Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Operating Temperature (max)
70C
Rad Hardened
No
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
W83628AG
Manufacturer:
NUVOTON
Quantity:
1 000
Address Offset:
Default Value:
Attribute:
Bit [31:24]
Bit [23:14]
Bit [13:12]
Bit 11
Bit 10
Bit [9:8]
Bit[7:0]
10.10
High Page Base Address of Fast Memory Decoder #0:
PCI A[31:24]. W83628AG will relocate the access within Fast Memory Decoder to ISA
bus, but the A[31:24] will be ignored since ISA has SA[23:0] only.
Low Base Address of Fast Memory Decoder #0:PCI A[23:14]
Reserved.
Enable/Disable Fast Memory Decoder #0
1=Enable, 0=Disable
Enable Fast Memory Decoder #0 High Page Address A[31:24] Comparison
Function.
1=Enable, 0=Disable
Fast Memory Decoder #0
00=Subtractive speed, 01= Slow speed, 10=Medium speed, 11=Fast speed
Fast Memory Decoder#0 Mask Control
Bit[7:0] is used to mask PCI address bits of A[23:14], respectively. If the corresponding
bit of the register is set to 1 (one), the corresponding address bits [23:14] are ignored by
the Fast Memory Address Decoder #0. The following example will show the Fast
Memory Decoder #0 size setting. If bit[7:0] = 00h, the size is 16K bytes. If bit[7:0]=01h,
the size is 32K bytes. If bit[7:0]=7fh, the size is 2M bytes. If bit[7:0]=ffh, the size is 4M
bytes.
BRIDGE FAST MEMORY DECODER #0 CONTROL REGISTERS
47h_46h_45h_44h
00h_00h_02h_00h
Read/Write
- 24 -
W83628AG & W83629AG
Publication Release Date: January, 2008
Revision 1.2

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