MT48H8M16LFB4-75:J TR Micron Technology Inc, MT48H8M16LFB4-75:J TR Datasheet - Page 32

• Manufacturer Part Number: MT48H8M16LFB4-75:J TR
• Manufacturer: Micron Technology Inc
• Type: Mobile SDRAMr

Specifications of MT48H8M16LFB4-75:J TR

• Organization: 8Mx16
• Density: 128Mb
• Address Bus: 14b
• Access Time (max): 8/5.4ns
• Maximum Clock Rate: 133MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 1.95V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 70mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Compliant

Table 17:
PDF: 09005aef832ff1ea/Source: 09005aef832ff1ac
sdr_mobile_sdram_cmd_op_timing_dia_fr10_08__3.fm - Rev. E 4/09 EN
Current State
Any
Idle
Row activating, active, or
precharging
Read
(auto precharge disabled)
Write
(auto precharge disabled)
Read
(with auto precharge)
Write
(with auto precharge)
Truth Table – Current State Bank n, Command to Bank m
Notes 1–6 apply to all parameters in this table; notes appear below table
Notes:
1. This table applies when CKE
2. This table describes alternate bank operation, except where noted; i.e., the current state is
3. Current state definitions:
4. AUTO REFRESH, SELF REFRESH and LOAD MODE REGISTER commands can only be issued
5. A BURST TERMINATE command cannot be issued to another bank; it applies to the bank
CS#
H
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
t
for bank n and the commands shown can be issued to bank m (assuming that bank m is in
such a state that the given command is supported). Exceptions are covered in the notes
below.
when all banks are idle.
represented by the current state only.
Idle:
Row active:
Read:
Write:
Read with auto
precharge enabled:
Write with auto
precharge enabled:
XSR has been met (if the previous state was self refresh).
RAS# CAS#
X
H
X
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
H
H
X
X
L
L
L
L
L
L
L
L
L
L
WE# Command/Action
X
H
X
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
The bank has been precharged, and
A row in the bank has been activated, and
data bursts/accesses and no register accesses are in progress.
has not yet terminated or been terminated.
A WRITE burst has been initiated, with auto precharge disabled, and
has not yet terminated or been terminated.
Starts with registration of a READ command with auto precharge
enabled and ends when
will be in the idle state.
Starts with registration of a WRITE command with auto precharge
enabled and ends when
will be in the idle state.
A READ burst has been initiated, with auto precharge disabled, and
128Mb: 8 Meg x 16, 4 Meg x 32 Mobile SDRAM
COMMAND INHIBIT (NOP/continue previous operation)
NO OPERATION (NOP/continue previous operation)
Any command otherwise supported for bank m
ACTIVE (select and activate row)
READ (select column and start READ burst)
WRITE (select column and start WRITE burst)
PRECHARGE
ACTIVE (select and activate row)
READ (select column and start new READ burst)
WRITE (select column and start WRITE burst)
PRECHARGE
ACTIVE (select and activate row)
READ (select column and start READ burst)
WRITE (select column and start new WRITE burst)
PRECHARGE
ACTIVE (select and activate row)
READ (select column and start new READ burst)
WRITE (select column and start WRITE burst)
PRECHARGE
ACTIVE (select and activate row)
READ (select column and start READ burst)
WRITE (select column and start new WRITE burst)
PRECHARGE
n-1
32
was HIGH and CKE
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
t
RP has been met. After
RP has been met. After
n
is HIGH (Table 18 on page 34), and after
t
RP has been met.
©2008 Micron Technology, Inc. All rights reserved.
t
RCD has been met. No
t
t
RP is met, the bank
RP is met, the bank
Operations
7, 8, 14
7, 8, 15
7, 8, 16
7, 8, 17
Notes
7, 10
7, 11
7, 12
7, 13
7
7
9
9
9
9