MT48H8M16LFB4-75:J TR Micron Technology Inc, MT48H8M16LFB4-75:J TR Datasheet - Page 42

• Manufacturer Part Number: MT48H8M16LFB4-75:J TR
• Manufacturer: Micron Technology Inc
• Type: Mobile SDRAMr

Specifications of MT48H8M16LFB4-75:J TR

• Organization: 8Mx16
• Density: 128Mb
• Address Bus: 14b
• Access Time (max): 8/5.4ns
• Maximum Clock Rate: 133MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 1.95V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 70mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Compliant

Timing Diagrams
READs
PDF: 09005aef832ff1ea/Source: 09005aef832ff1ac
sdr_mobile_sdram_cmd_op_timing_dia_fr10_08__3.fm - Rev. E 4/09 EN
READ bursts are initiated with a READ command, as shown in Figure 10 on page 27. The
starting column and bank addresses are provided with the READ command, and auto
precharge is either enabled or disabled for that burst access. If auto precharge is
enabled, the row being accessed is precharged at the completion of the burst. For the
generic READ commands used in the following illustrations, auto precharge is disabled.
During READ bursts, the valid data-out element from the starting column address is
available following the CL after the READ command. Each subsequent data-out element
will be valid by the next positive clock edge. Figure 18 on page 43 shows general timing
for each possible CL setting.
Upon completion of a burst, assuming no other commands have been initiated, the DQ
signals will go to High-Z. A continuous page burst continues until terminated. At the end
of the page, it wraps to column 0 and continues.
Data from any READ burst can be truncated with a subsequent READ command, and
data from a fixed-length READ burst can be followed immediately by data from a READ
command. In either case, a continuous flow of data can be maintained. The first data
element from the new burst either follows the last element of a completed burst or the
last desired data element of a longer burst that is being truncated. The new READ
command should be issued x cycles before the clock edge at which the last desired data
element is valid, where x = CL - 1. This is shown in Figure 19 on page 44 for CL2 and CL3.
Mobile SDRAM devices use a pipelined architecture and therefore do not require the 2n
rule associated with a prefetch architecture. A READ command can be initiated on any
clock cycle following a previous READ command. Full-speed random read accesses can
be performed to the same bank, as shown in Figure 18 on page 43, or each subsequent
READ can be performed to a different bank.
128Mb: 8 Meg x 16, 4 Meg x 32 Mobile SDRAM
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Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2008 Micron Technology, Inc. All rights reserved.
Timing Diagrams