MT48H8M16LFB4-75:J TR Micron Technology Inc, MT48H8M16LFB4-75:J TR Datasheet - Page 63

• Manufacturer Part Number: MT48H8M16LFB4-75:J TR
• Manufacturer: Micron Technology Inc
• Type: Mobile SDRAMr

Specifications of MT48H8M16LFB4-75:J TR

• Organization: 8Mx16
• Density: 128Mb
• Address Bus: 14b
• Access Time (max): 8/5.4ns
• Maximum Clock Rate: 133MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 1.95V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 70mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Compliant

Figure 41:
WRITE With Auto Precharge
PDF: 09005aef832ff1ea/Source: 09005aef832ff1ac
sdr_mobile_sdram_cmd_op_timing_dia_fr10_08__3.fm - Rev. E 4/09 EN
Command
BA0, BA1
Address
DQM
CKE
CLK
A10
DQ
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
T0
Bank
Row
Row
Single READ Without Auto Precharge
t CMH
t AH
t AH
t AH
t CKH
t RCD
t RAS
t RC
Notes:
t CK
T1
NOP
1. For this example, BL = 1, CL = 2, and the READ burst is followed by a manual PRECHARGE.
• Interrupted by a READ (with or without auto precharge): A READ to bank m will inter-
• Interrupted by a WRITE (with or without auto precharge): A WRITE to bank m will
rupt a WRITE on bank n when registered, with the data-out appearing CL later. The
precharge to bank n will begin after
bank m is registered. The last valid WRITE to bank n will be data-in registered one
clock prior to the READ to bank m (see Figure 42 on page 64).
interrupt a WRITE on bank n when registered. The precharge to bank n will begin
after
valid data WRITE to bank n will be data registered one clock prior to a WRITE to
bank m (see Figure 43 on page 64).
Disable auto precharge
t CL
t CMS
Column m
t
T2
Bank
READ
WR is met, where
t CMH
t CH
CL = 2
T3
NOP
t LZ
t AC
t
WR begins when the WRITE to bank m is registered. The last
128Mb: 8 Meg x 16, 4 Meg x 32 Mobile SDRAM
63
T4
Dout m
NOP
t OH
t HZ
t
Single bank
Micron Technology, Inc., reserves the right to change products or specifications without notice.
WR is met, where
PRECHARGE
All banks
Bank(s)
T5
T6
t RP
NOP
t
WR begins when the READ to
©2008 Micron Technology, Inc. All rights reserved.
ACTIVE
Row
Bank
Row
T7
Timing Diagrams
T8
NOP
Don’t Care
Undefined