ISP1160BD/01 STEricsson, ISP1160BD/01 Datasheet - Page 13

• Manufacturer Part Number: ISP1160BD/01
• Manufacturer: STEricsson

Specifications of ISP1160BD/01

• Lead Free Status / RoHS Status: Supplier Unconfirmed

ISP1160-01_7
Product data sheet
Fig 11. DMA transfer in burst mode.
DACK_N
RD_N or
WR_N
D [ 15:0 ]
DREQ
EOT
N = 1/2 byte count of transfer data, K = number of cycles/burst.
8.6.1 Pin configuration
data #1
8.6 Interrupts
In
HIGH and DACK_N is active LOW.
The ISP1160/01 has an interrupt request pin INT.
The interrupt output signals have four configuration modes:
Mode 0
Mode 1
Mode 2
Mode 3
Fig 10. DMA transfer in single-cycle mode.
Figure 10
DACK_N
RD_N or
WR_N
data #K
D [ 15:0 ]
N = 1/2 byte count of transfer data.
DREQ
EOT
and
Mode 0 level trigger, active LOW
Mode 1 level trigger, active HIGH
Mode 2 edge trigger, active LOW
Mode 3 edge trigger, active HIGH.
Figure
data #(K+1)
Rev. 07 — 29 September 2009
data #1
11, the DMA transfer is configured such that DREQ is active
data #2
data #2K
data #(N−K+1)
Embedded USB host controller
data #N
ISP1160/01
© ST-ERICSSON 2009. All rights reserved.
data #N
004aaa368
004aaa369
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