PNX1301EH NXP Semiconductors, PNX1301EH Datasheet - Page 155
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PNX1301EH
Manufacturer Part Number
PNX1301EH
Description
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1301EH.pdf
(548 pages)
Specifications of PNX1301EH
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Table 9-14. AO highway arbiter latency requirement
examples
stereo
16 bits/sample
stereo
16 bits/sample
stereo
16 bits/sample
6 channel
16 bits/sample
stereo
32 bits/sample
6 channel
32 bits/sample
TransMode
(kHz)
44.1
48.0
96.0
48.0
48.0
48.0
f
s
20,833
20,833
22,676
20,833
10,417
20,833
(ns)
T
latency
arbiter
22,656
20,813
10,397
20,813
6,924
6,924
max.
(ns)
1 request every
1 request every
1 request every
1 request every
1 request every
1 request every
362,812 ns
333,333 ns
166,667 ns
166,667 ns
111,111 ns
55,556 ns
access
pattern
9.14
In normal operation, the DSPCPU and AO hardware
continuously exchange buffers without ever failing to
transmit a sample. If the DSPCPU fails to provide a new
buffer in time, the UNDERRUN error flag is raised, and
the last valid sample or sample pair is repeated until a
new buffer of data is assigned by an ACK1 or ACK2. The
UNDERRUN flag is not affected by ACK1 or ACK2; it can
only be cleared by an explicit ACK_UDR.
If an HBE error occurs, the last valid sample or sample
pair is repeated until the AO hardware retrieves a new
sample buffer across the highway.
PRELIMINARY SPECIFICATION
ERROR BEHAVIOR
Audio Out
9-11
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