PIC24FV16KA301-I/P Microchip Technology, PIC24FV16KA301-I/P Datasheet - Page 114

• Manufacturer Part Number: PIC24FV16KA301-I/P
• Description: MCU 16KB FLASH 2KB RAM 20-PDIP
• Manufacturer: Microchip Technology

Specifications of PIC24FV16KA301-I/P

• Controller Family/series: PIC24F
• Core Size: 16bit
• No. Of I/o's: 17
• Program Memory Size: 16KB
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 2KB
• Cpu Speed: 32MHz
• Oscillator Type: External, Internal
• Rohs Compliant: Yes
• Processor Series: PIC24FV
• Core: PIC
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Package / Case: PDIP-20
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC24FV32KA304 FAMILY
REGISTER 8-33:
DS39995B-page 114
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11-8
bit 7
bit 6-0
CPUIRQ
R-0
U-0
—
CPUIRQ: Interrupt Request from Interrupt Controller CPU bit
1 = An interrupt request has occurred but has not yet been Acknowledged by the CPU (this will
0 = No interrupt request is left unacknowledged
Unimplemented: Read as ‘0’
VHOLD: Vector Hold bit
Allows vector number capture and changes what Interrupt is stored in the VECNUM bit.
1 = VECNUM will contain the value of the highest priority pending interrupt, instead of the current
0 = VECNUM will contain the value of the last Acknowledged interrupt (last interrupt that has occurred
Unimplemented: Read as ‘0’
ILR<3:0>: New CPU Interrupt Priority Level bits
1111 = CPU interrupt priority level is 15
•
•
•
0001 = CPU interrupt priority level is 1
0000 = CPU interrupt priority level is 0
Unimplemented: Read as ‘0’
VECNUM<6:0>: Vector Number of Pending Interrupt bits
0111111 = Interrupt vector pending is number 135
•
•
•
0000001 = Interrupt vector pending is number 9
0000000 = Interrupt vector pending is number 8
VECNUM6
happen when the CPU priority is higher than the interrupt priority)
interrupt
with higher priority than the CPU, even if other interrupts are pending)
U-0
R-0
—
INTTREG: INTERRUPT CONTROL AND STATUS REGISTER
W = Writable bit
‘1’ = Bit is set
VECNUM5
VHOLD
R/W-0
R-0
VECNUM4
U-0
R-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
VECNUM3
ILR3
R-0
R-0
VECNUM2
ILR2
R-0
R-0
 2011 Microchip Technology Inc.
x = Bit is unknown
VECNUM1
ILR1
R-0
R-0
VECNUM0
ILR0
R-0
R-0
bit 8
bit 0