PIC24FV16KA301-I/P Microchip Technology, PIC24FV16KA301-I/P Datasheet - Page 120

• Manufacturer Part Number: PIC24FV16KA301-I/P
• Description: MCU 16KB FLASH 2KB RAM 20-PDIP
• Manufacturer: Microchip Technology

Specifications of PIC24FV16KA301-I/P

• Controller Family/series: PIC24F
• Core Size: 16bit
• No. Of I/o's: 17
• Program Memory Size: 16KB
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 2KB
• Cpu Speed: 32MHz
• Oscillator Type: External, Internal
• Rohs Compliant: Yes
• Processor Series: PIC24FV
• Core: PIC
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Package / Case: PDIP-20
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC24FV32KA304 FAMILY
REGISTER 9-1:
DS39995B-page 120
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
2:
3:
Reset values for these bits are determined by the FNOSC Configuration bits.
Also resets to ‘0’ during any valid clock switch or whenever a non-PLL Clock mode is selected.
When SOSC is selected to run from a digital clock input, rather than an external crystal (SOSCSRC = 0),
this bit has no effect.
CLKLOCK: Clock Selection Lock Enabled bit
If FSCM is enabled (FCKSM1 = 1):
1 = Clock and PLL selections are locked
0 = Clock and PLL selections are not locked and may be modified by setting the OSWEN bit
If FSCM is disabled (FCKSM1 = 0):
Clock and PLL selections are never locked and may be modified by setting the OSWEN bit.
Unimplemented: Read as ‘0’
LOCK: PLL Lock Status bit
1 = PLL module is in lock or PLL module start-up timer is satisfied
0 = PLL module is out of lock, PLL start-up timer is running or PLL is disabled
Unimplemented: Read as ‘0’
CF: Clock Fail Detect bit
1 = FSCM has detected a clock failure
0 = No clock failure has been detected
SOSCDRV: Secondary Oscillator Drive Strength bit
1 = High-power SOSC circuit selected
0 = Low/high-power select is done via the SOSCSRC Configuration bit
SOSCEN: 32 kHz Secondary Oscillator (SOSC) Enable bit
1 = Enable secondary oscillator
0 = Disable secondary oscillator
OSWEN: Oscillator Switch Enable bit
1 = Initiate an oscillator switch to clock source specified by NOSC<2:0> bits
0 = Oscillator switch is complete
OSCCON: OSCILLATOR CONTROL REGISTER (CONTINUED)
(2)
(3)
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