PIC24FV16KA301-I/P Microchip Technology, PIC24FV16KA301-I/P Datasheet - Page 72

• Manufacturer Part Number: PIC24FV16KA301-I/P
• Description: MCU 16KB FLASH 2KB RAM 20-PDIP
• Manufacturer: Microchip Technology

Specifications of PIC24FV16KA301-I/P

• Controller Family/series: PIC24F
• Core Size: 16bit
• No. Of I/o's: 17
• Program Memory Size: 16KB
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 2KB
• Cpu Speed: 32MHz
• Oscillator Type: External, Internal
• Rohs Compliant: Yes
• Processor Series: PIC24FV
• Core: PIC
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Package / Case: PDIP-20
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC24FV32KA304 FAMILY
6.4.3
To read a word from data EEPROM, the table read
instruction is used. Since the EEPROM array is only
16 bits wide, only the TBLRDL instruction is needed.
The read operation is performed by loading TBLPAG
and WREG with the address of the EEPROM location
followed by a TBLRDL instruction.
EXAMPLE 6-5:
DS39995B-page 72
int __attribute__ ((space(eedata))) eeData = 0x1234;
int data;
unsigned int offset;
// Set up a pointer to the EEPROM location to be erased
TBLPAG = __builtin_tblpage(&eeData);
offset = __builtin_tbloffset(&eeData);
data = __builtin_tblrdl(offset);
READING THE DATA EEPROM
READING THE DATA EEPROM USING THE TBLRD COMMAND
// Data read from EEPROM
A typical read sequence, using the Table Pointer
management
builtin_tbloffset)
(builtin_tblrdl) procedures from the C30
compiler library, is provided in
Program Space Visibility (PSV) can also be used to
read locations in the data EEPROM.
// Global variable located in EEPROM
// Initialize EE Data page pointer
// Initizlize lower word of address
// Write EEPROM data to write latch
(builtin_tblpage
 2011 Microchip Technology Inc.
and
Example
table
6-5.
read
and