PIC24FV16KA301-I/P Microchip Technology, PIC24FV16KA301-I/P Datasheet - Page 145
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PIC24FV16KA301-I/P
Manufacturer Part Number
PIC24FV16KA301-I/P
Description
MCU 16KB FLASH 2KB RAM 20-PDIP
Manufacturer
Microchip Technology
Datasheet
1.PIC24FV16KA301-IP.pdf
(320 pages)
Specifications of PIC24FV16KA301-I/P
Controller Family/series
PIC24F
Core Size
16bit
No. Of I/o's
17
Program Memory Size
16KB
Eeprom Memory Size
512Byte
Ram Memory Size
2KB
Cpu Speed
32MHz
Oscillator Type
External, Internal
Rohs Compliant
Yes
Processor Series
PIC24FV
Core
PIC
Data Bus Width
16 bit
Program Memory Type
Flash
Data Ram Size
2 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Package / Case
PDIP-20
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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13.0
The Timer2/3 and Timer4/5 modules are 32-bit timers,
which can also be configured as four independent,16-bit
timers with selectable operating modes.
As a 32-bit timer, Timer2/3 or Timer4/5 operate in three
modes:
• Two independent 16-bit timers (Timer2 and
• Single 32-bit timer
• Single 32-bit synchronous counter
They also support these features:
• Timer gate operation
• Selectable prescaler settings
• Timer operation during Idle and Sleep modes
• Interrupt on a 32-bit Period register match
• ADC Event Trigger
Individually, all four of the 16-bit timers can function as
synchronous timers or counters. They also offer the
features listed above, except for the ADC event trigger
(this is implemented only with Timer3). The operating
modes and enabled features are determined by setting
the appropriate bit(s) in the T2CON, T3CON, T4CON,
and T5CON registers. T2CON,T3CON, T4CON, and
T5CON are provided in generic form in
and
For 32-bit timer/counter operation, Timer2/Timer4 is
the least significant word (lsw) and Timer3
the most significant word (msw) of the 32-bit timer.
2011 Microchip Technology Inc.
Note:
Timer3) with all 16-bit operating modes (except
Asynchronous Counter mode)
Note:
Register
TIMER2/3 AND TIMER4/5
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended
reference source. For more information
on Timers, refer to the “PIC24F Family
Reference
“Timers” (DS39704).
For 32-bit operation, T3CON or T5CON
control bits are ignored. Only T2CON or
T4CON control bits are used for setup and
control. Timer2
inputs are utilized for the 32-bit timer
modules, but an interrupt is generated with
the Timer3 or Timer5 interrupt flags.
13-2, respectively.
to
Manual”,
or Timer4
be
a
comprehensive
Section
clock and gate
Register 13-1
/Timer
PIC24FV32KA304 FAMILY
14.
5 is
To configure Timer2/3 or Timer4/5 for 32-bit operation:
1.
2.
3.
4.
5.
6.
The timer value, at any point, is stored in the register
pair, TMR3:TMR2 (or TMR5:TMR4). TMR3 (TMR5)
always contains the most significant word of the count,
while TMR2 (TMR4) contains the least significant word.
To configure any of the timers for individual 16-bit
operation:
1.
2.
3.
4.
5.
6.
Set the T32 bit (T2CON<3> or T4CON<3> = 1).
Select the prescaler ratio for Timer2 or Timer4
using the TCKPS<1:0> bits.
Set the Clock and Gating modes using the TCS
and TGATE bits.
Load the timer period value. PR3 (or PR5) will
contain the most significant word of the value
while PR2 (or PR4) contains the least significant
word.
If interrupts are required, set the interrupt enable
bit, TxIE. Use the priority bits, TxIP<2:0>, to set
the interrupt priority.
Set the TON bit (TxCON<15> = 1).
Clear the T32 bit corresponding to that timer
(T2CON<3>
T4CON<3> for Timer4 and Timer5).
Select the timer prescaler ratio using the
TCKPS<1:0> bits.
Set the Clock and Gating modes using the TCS
and TGATE bits.
Load the timer period value into the PRx
register.
If interrupts are required, set the interrupt enable
bit, TxIE; use the priority bits, TxIP<2:0>, to set
the interrupt priority.
Set the TON bit (TxCON<15> = 1).
for
Timer2
and
DS39995B-page 145
Timer3
or
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