ISL95311UIU10Z-TK Intersil, ISL95311UIU10Z-TK Datasheet - Page 4

• Manufacturer Part Number: ISL95311UIU10Z-TK
• Description: IC XDCP 128-TAP 50KOHM 10-MSOP
• Manufacturer: Intersil
• Series: XDCP™r

Specifications of ISL95311UIU10Z-TK

• Taps: 128
• Resistance (ohms): 50K
• Number Of Circuits: 1
• Temperature Coefficient: 45 ppm/°C Typical
• Memory Type: Non-Volatile
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Resistance In Ohms: 50K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Operating Specifications
EEPROM SPECS
SERIAL INTERFACE SPECS
Hysteresis
V
SYMBOL
t
t
t
CC
I
SU:STA
HD:STA
SU:DAT
LkgDig
t
t
t
I
I
Vpor
Cpin
f
t
V
HIGH
LOW
DCP
V
CC1
CC2
I
I
V
SCL
t
BUF
t
SB
V+
t
AA
Ramp
OL
IN
D
IH
IL
V
Write/read
V
Write
V
V+ Bias Current
Leakage Current, at Pins SDA, SCL,
A0, and A1 Pins
DCP Wiper Response Time
Power-On Recall Voltage
V
Power-Up Delay
EEPROM Endurance
EEPROM Retention
A0, A1, SDA, and SCL Input Buffer
LOW Voltage
A0, A1, SDA, and SCL Input Buffer
HIGH Voltage
SDA and SCL Input Buffer Hysteresis
SDA Output Buffer LOW Voltage,
Sinking 4mA
A0, A1, SDA, and SCL Pin
Capacitance
SCL Frequency
Pulse Width Suppression Time at
SDA and SCL Inputs
SCL Falling Edge to SDA Output Data
Valid
Time the Bus Must be Free Before the
Start of a New Transmission
Clock LOW Time
Clock HIGH Time
START Condition Set-up Time
START Condition Hold Time
Input Data Set-up Time
CC
CC
CC
CC
Supply Current, Volatile
Supply Current, Nonvolatile
Current, Standby
Ramp Rate
PARAMETER
4
Over the recommended operating conditions unless otherwise specified.
f
read, and volatile write states only)
f
nonvolatile write states only)
V
V
V+ = 13.2V, V
Voltage at pin from GND to V
SCL falling edge of last bit of DCP data byte to
wiper change
V
recall completed, and I
state
Temperature ≤ +75°C
Any pulse narrower than the max spec is
suppressed
SCL falling edge crossing 30% of V
SDA exits the 30% to 70% of V
SDA crossing 70% of V
condition, to SDA crossing 70% of V
the following START condition
Measured at the 30% of V
Measured at the 70% of V
SCL rising edge to SDA falling edge; both
crossing 70% of V
From SDA falling edge crossing 30% of V
SCL falling edge crossing 70% of V
From SDA exiting the 30% to 70% of V
window, to SCL rising edge crossing 30% of
V
SCL
SCL
V
CC
CC
CC
CC
CC
= +5.5V, I
= +3.6V, I
above Vpor, to DCP initial value register
= 400kHz; SDA = Open; (for I
= 400kHz; SDA = Open; (for I
range at which memory recall occurs
ISL95311
TEST CONDITIONS
CC
2
2
C interface in standby state
C interface in standby state
= +5.5V
CC
2
CC
C Interface in standby
CC
CC
during a STOP
CC
crossing
crossing
CC
window
2
2
CC
CC
C, active,
C, active,
CC
, until
CC
during
CC
to
(Note 15)
200,000
0.05*
1300
1300
V
V
MIN
-0.3
0.7*
600
600
600
100
-10
1.5
0.2
50
CC
CC
0
(Note 1)
TYP
1.8
10
(Note 15)
V
MAX
V
0.3*
400
900
2.6
0.3
0.4
CC
10
50
CC
1
3
5
2
1
1
3
+
February 6, 2008
Cycles
Years
FN8084.1
UNIT
V/ms
kHz
mA
mA
ms
µA
µA
µA
µA
pF
µs
ns
ns
ns
ns
ns
ns
ns
ns
V
V
V
V
V