ISL95311UIU10Z-TK Intersil, ISL95311UIU10Z-TK Datasheet - Page 6

• Manufacturer Part Number: ISL95311UIU10Z-TK
• Description: IC XDCP 128-TAP 50KOHM 10-MSOP
• Manufacturer: Intersil
• Series: XDCP™r

Specifications of ISL95311UIU10Z-TK

• Taps: 128
• Resistance (ohms): 50K
• Number Of Circuits: 1
• Temperature Coefficient: 45 ppm/°C Typical
• Memory Type: Non-Volatile
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Resistance In Ohms: 50K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SDA vs SCL Timing
A0, A1 Pin Timing
Pin Descriptions
Potentiometer Pins
R
R
wiper and not the voltage potential on the terminals. With
WR set to 127, the wiper will be closest to R
WR set to 00, the wiper is closest to R
R
R
terminal of a mechanical potentiometer. The position of the
wiper within the array is determined by the WR.
Bus Interface Pins
SERIAL DATA INPUT/OUTPUT (SDA)
The SDA is a bidirectional serial data input/output pin for the
I
wiper register address and data from a I
device at the rising edge of the serial clock SCL, and it shifts
out data after each falling edge of the serial clock SCL.
SDA requires an external pull-up resistor, since it’s an open
drain input/output.
SERIAL CLOCK (SCL)
This input is the serial clock of the I
SCL requires an external pull-up resistor, since it’s an open
drain input.
2
L
W
W
C interface. It receives device address, operation code,
H
(OUTPUT TIMING)
and R
and R
is the wiper terminal and is equivalent to the movable
(INPUT TIMING)
H
L
are referenced to the relative position of the
SDA
SDA
SCL
t
SU:STA
SDA IN
A0, A1
SCL
6
t
HD:STA
START
2
C serial interface.
L
t
t
F
.
SU:A
2
C external master
t
SU:DAT
H
, and with the
CLK 1
t
HIGH
ISL95311
t
LOW
DEVICE ADDRESS (A1–A0)
The Address inputs are used to set the least significant 2 bits
of the 8-bit I
address serial data stream must be made with the Address
input pins in order to initiate communication with the
ISL95311. A maximum of four ISL95311 devices may occupy
the I
Principles of Operation
The ISL95311 is an integrated circuit incorporating one DCP
with their associated register, non-volatile memory, and a
I
a host and the potentiometers and memory. The resistor
array is comprised of 127 individual resistors connected in
series. At either end of the array and between each resistor
is an electronic switch between that point and the wiper.
The wiper, when at either fixed terminal, acts like its
mechanical equivalent and does not move beyond the last
position. That is, the counter does not wrap around when
clocked to either extreme.
The electronic switches on the device operate in a “make
before break” mode when the wiper changes tap positions.
When the device is powered-down, the last wiper position
stored will be maintained in the nonvolatile memory. When
power is restored, the contents of the memory are recalled
and the wiper is set to the value last stored.
t
2
HD:DAT
C serial interface providing direct communication between
2
C serial bus.
t
R
2
C interface slave address. A match in the slave
t
AA
t
HD:A
t
STOP
DH
t
BUF
t
SU:STO
February 6, 2008
FN8084.1