PIC18F86K90-I/PT Microchip Technology, PIC18F86K90-I/PT Datasheet - Page 394

• Manufacturer Part Number: PIC18F86K90-I/PT
• Description: 64kB Flash, 4kB RAM, 1kB EE, 16MIPS, NanoWatt XLP, LCD, 5V 80 TQFP 12x12x1mm TRA
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F86K90-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87K90 FAMILY
24.7
When a comparator is active and the device is placed
in Sleep mode, the comparator remains active and the
interrupt is functional, if enabled. This interrupt will
wake-up the device from Sleep mode, when enabled.
Each operational comparator will consume additional
current.
TABLE 24-3:
DS39957B-page 394
INTCON
PIR6
PIE6
IPR6
CM1CON
CM2CON
CM3CON
CVRCON
CMSTAT
PORTF
LATF
TRISF
PORTG
LATG
TRISG
PORTH
LATH
TRISH
Legend:
Name
Comparator Operation
During Sleep
— = unimplemented, read as ‘ 0 ’.
CMP3OUT CMP2OUT CMP1OUT
GIE/GIEH PEIE/GIEL
CVREN
TRISF7
TRISH7
LATF7
LATH7
CON
CON
CON
Bit 7
RH7
RF7
REGISTERS ASSOCIATED WITH COMPARATOR MODULE
—
—
—
—
—
—
CVROE
TRISH6
TRISF6
LATH6
LATF6
Bit 6
COE
COE
COE
RH6
RF6
—
—
—
—
—
—
TMR0IE
TRISH5
CVRSS
TRISF5
LATH5
LATF5
CPOL
CPOL
CPOL
Bit 5
RG5
RF5
RH5
—
—
—
—
—
Preliminary
EVPOL1
EVPOL1
EVPOL1
TRISG4
TRISH4
TRISF4
INT0IE
LATG4
LATH4
LATF4
CVR4
Bit 4
EEIF
EEIE
EEIP
RG4
RH4
RF4
—
EVPOL0
EVPOL0
EVPOL0
TRISG3
TRISH3
TRISF3
To minimize power consumption while in Sleep mode,
turn off the comparators (CON = 0 ) before entering
Sleep. If the device wakes up from Sleep, the contents
of the CMxCON register are not affected.
24.8
A device Reset forces the CMxCON registers to their
Reset state. This forces both comparators and the
voltage reference to the OFF state.
LATG3
LATH3
LATF3
CVR3
RBIE
Bit 3
RG3
RF3
RH3
—
—
—
—
Effects of a Reset
CMP3IF
CMP3IE
CMP3IP
TMR0IF
TRISG2
TRISH2
TRISF2
LATG2
LATH2
LATF2
CREF
CREF
CREF
CVR2
Bit 2
RG2
RF2
RH2
—
CMP2IF
CMP2IE
CMP2IP
TRISG1
TRISH1
TRISF1
LATG1
INT0IF
LATH1
LATF1
CCH1
CCH1
CCH1
CVR1
 2010 Microchip Technology Inc.
Bit 1
RG1
RF1
RH1
—
CMP1IF
CMP1IE
CMP1IP
TRISG0
TRISH0
LATG0
LATH0
CCH0
CCH0
CCH0
CVR0
Bit 0
RBIF
RG0
RH0
—
—
—
—
Values on
Reset
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