ISP1564HLUM STEricsson, ISP1564HLUM Datasheet - Page 10

ISP1564HLUM

Manufacturer Part Number
ISP1564HLUM
Description
Manufacturer
STEricsson
Datasheet

Specifications of ISP1564HLUM

Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISP1564HLUM
Manufacturer:
ST-Ericsson Inc
Quantity:
10 000
Company:
Part Number:
ISP1564HLUM
Quantity:
4 192
NXP Semiconductors
Table 2.
[1]
[2]
[3]
ISP1564_1
Product data sheet
Symbol
PWE1_N
GND_RREF
RREF
GNDA
DM1
GNDA
DP1
V
OC2_N
PWE2_N
GNDA
DM2
GNDA
DP2
V
GND
GND
SCL
SDA
V
PME#
V
CCA(AUX)
CCA(AUX)
CC(IO)AUX
CC(IO)AUX
Symbol names ending with # represent active LOW signals for PCI pins, for example: NAME#. Symbol names ending with underscore N
represent active LOW signals for USB pins, for example: NAME_N.
I = input; O = output; I/O = input/output; AI/O = analog input/output, AI = analog input, AO = analog output.
Connect to ground if I
[1]
Pin description
Pin
LQFP100 TFBGA100
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
2
C-bus is not used.
D7
A8
B8
C7
A7
B7
A6
B6
E6
D6
C5
A5
B5
A4
B4
B2
D5
B3
A3
A2
A1
C4
…continued
Type
O
-
AI/O
-
AI/O
-
AI/O
-
I
O
-
AI/O
-
AI/O
-
-
-
I/O
I/O
-
O
-
[2]
Rev. 01 — 4 December 2006
Description
power enable for the USB downstream port 1
3.3 V output pad; 3 ns slew rate control; CMOS; open-drain
ground for external resistor on pin RREF
analog connection for the external resistor (11 k
analog ground
D ; analog connection for the USB downstream port 1; pull down to
ground through a 15 k resistor, even when the port is not used
analog ground
D+; analog connection for the USB downstream port 1; pull down to
ground through a 15 k resistor, even when the port is not used
auxiliary analog supply voltage; see
overcurrent sense input for the USB downstream port 2 (digital); when
not in use, connect this pin to 3.3 V
3.3 V input pad; CMOS
power enable for the USB downstream port 2
3.3 V output pad; 3 ns slew rate control; CMOS; open-drain
analog ground
D ; analog connection for the USB downstream port 2; pull down to
ground through a 15 k resistor, even when the port is not used
analog ground
D+; analog connection for the USB downstream port 2; pull down to
ground through a 15 k resistor, even when the port is not used
auxiliary analog supply voltage; see
ground
ground
I
I
I
I
I/O pads auxiliary supply voltage; see
PCI Power Management Event; used by a device to request a change in
the device or system power state
PCI pad; 3.3 V signaling; open-drain
I/O pads auxiliary supply voltage; see
2
2
2
2
C-bus clock; pull up to 3.3 V through a 10 k resistor
C-bus pad; clock signal
C-bus data; pull up to 3.3 V through a 10 k resistor
C-bus pad; data signal
Section 7.8
Section 7.8
Section 7.8
Section 7.8
HS USB PCI Host Controller
1 %)
© NXP B.V. 2006. All rights reserved.
ISP1564
[3]
[3]
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