ISP1564HLUM STEricsson, ISP1564HLUM Datasheet - Page 75

• Manufacturer Part Number: ISP1564HLUM
• Manufacturer: STEricsson

Specifications of ISP1564HLUM

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Lead Free Status / Rohs Status: Compliant

NXP Semiconductors
[1]
Table 115. PORTSC 1, 2 - Port Status and Control 1, 2 register bit description
Address: Content of the base address register + 64h + (4
ISP1564_1
Product data sheet
Bit
Symbol
Reset
Access
Bit
31 to 23
22
21
20
19 to 16
15 to 14
13
12
The reserved bits must always be written with the reset value.
Symbol
reserved
WKOC_E
WKDS
CNNT_E
WKCNNT_E Wake on Connect Enable: Default = 0. Setting this bit enables the port to be sensitive to device
PTC[3:0]
reserved
PO
PP
SUSP
R/W
7
0
Description
-
Wake on Overcurrent Enable: Default = 0. Setting this bit enables the port to be sensitive to
overcurrent conditions as wake-up events.
Wake on Disconnect Enable: Default = 0. Setting this bit enables the port to be sensitive to
device disconnects as wake-up events.
connects as wake-up events.
Port Test Control: Default = 0000b. When this field is logic 0, the port is not operating in test
mode. A nonzero value indicates that it is operating in test mode and test mode is indicated by
the value. The encoding of test mode bits are:
0000b — Test mode disabled
0001b — Test J_STATE
0010b — Test K_STATE
0011b — Test SE0_NAK
0100b — Test packet
0101b — Test FORCE_ENABLE
0110b to 1111b — reserved
-
Port Owner: Default = 1. This bit unconditionally goes to logic 0 when CF (bit 0) in the
CONFIGFLAG register makes logic 0 to logic 1 transition. This bit unconditionally goes to logic 1
when the CF bit is logic 0. The system software uses this field to release ownership of the port to
a selected Host Controller, if the attached device is not a high-speed device. Software writes
logic 1 to this bit, if the attached device is not a high-speed device. Logic 1 in this bit means that
a companion Host Controller owns and controls the port.
Port Power: The function of this bit depends on the value of PPC (bit 4) in the HCSPARAMS
register.
If PPC = 0 and PP = 1 — The Host Controller does not have port power control switches.
Always powered.
If PPC = 1 and PP = 1 or 0 — The Host Controller has port power control switches. This bit
represents the current setting of the switch: logic 0 = off, logic 1 = on. When PP is logic 0, the
port is nonfunctional and will not report any status.
When an overcurrent condition is detected on a powered port and PPC is logic 1, the PP bit in
each affected port may be changed by the Host Controller from logic 1 to logic 0, removing
power from the port.
FPR
R/W
6
0
OCC
R
5
0
Rev. 01 — 4 December 2006
[1]
OCA
Port Number
R
4
0
[1]
[1]
PEDC
R/W
1) where Port Number is 1, 2
3
0
PED
R/W
2
0
HS USB PCI Host Controller
ECSC
R/W
1
0
© NXP B.V. 2006. All rights reserved.
ISP1564
ECCS
R
0
0
74 of 99