IDT77305L15PF IDT, Integrated Device Technology Inc, IDT77305L15PF Datasheet - Page 2

IDT77305L15PF

Manufacturer Part Number
IDT77305L15PF
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT77305L15PF

Mounting
Surface Mount
Lead Free Status / Rohs Status
Not Compliant
muxed FIFO with multiple programmable modes of operation. The
IDT77305 can be used as a stand alone device or as a building block
element. Within the UtopiaFIFO, the input FIFOs act as intermediate
queues for the input streams to allow synchronization with a common output
stream (see Functional Block Diagram). Each of the four input synchro-
nous (clocked) FIFOs are 64 words (128 bytes) in depth. Separate input
and output clocks are supported to 80 MHz. As a stand alone element four
independent 9-bit input streams are concentrated onto one selectable 9
IDT77305
UtopiaFIFO™ 4 to 1 (128 x 9 x 4) Multiplexer-FIFO
The IDT77305 UtopiaFIFO is a high-speed, low power, four to one,
CLAVR c
Data d 8
Data d 7
Data d 6
Data d 5
Data d 4
Data d 3
Data d 2
Data d 1
Data d 0
SOCR d
Data c 8
Data c 7
Data c 6
Data c 5
Data c 4
Data c 3
Data c 2
Data c 1
Data c 0
SOCR c
ENR b
ENR c
GND
Vcc
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
100 PIN
PN-100
TQFP
2
or 18-bit output bus. The Bus Size Select pin (BSS) determines the
desired output bus width. In a building block configuration, multiple
devices can be used to multiplex larger numbers of input streams
onto output buses greater than 18 bits. The principle application is
in ATM networking based systems, but can be used in any data or
telecommunications application requiring the merging of indepen-
dent data streams into a single output.
which sequentially selects one of the four FIFOs. Alternatively, external
FIFO selection for data output can be made internally via a round robin
Commercial and Industrial Temperature Ranges
58
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
57
56
55
54
53
52
51
3206 drw 02
CLAVS
E N S
SOCS
Vcc
Q
Q
Q
Q
GND
Q
Q
Q
Q
Q
Vcc
Q
Q
Q
Q
GND
Q
Q
Q
Q
Q
Preliminary
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
,

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