IDT77305L15PF IDT, Integrated Device Technology Inc, IDT77305L15PF Datasheet - Page 3

• Manufacturer Part Number: IDT77305L15PF
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT77305L15PF

• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

IDT77305
UtopiaFIFO™ 4 to 1 (128 x 9 x 4) Multiplexer-FIFO
CR0 - CR3
CLAVR a
CLAVR b
CLAVR c
CLAVR d
DATA b
DATA d
CLAVS
DATA a
DATA c
ENR b
ENR d
ENR a
ENR c
Name
ENS
GND
BSS
CRC
CSS
ECT
BDI
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
____
I
I
I
I
I
I
Byte Deletion/Insertion. BDI = "1" insert byte 6 or delete byte 5, BDI = "0" no change to bytes 5 or 6 (see Table 4).
Bus Size Selection. BSS = "0" 18-bit output bus, BSS = "1" 9-bit output bus.
Cell Available (FIFO-a)—Receive side. Rx mode: CLAVR notifies UtopiaFIFO an entire cell is available for transfer. It is
an input signal. Tx mode: CLAVR notifies sending agent the UtopiaFIFO can accept an entire cell. It is an output signal.
Cell Available (FIFO-b)—Receive side. Rx mode: CLAVR notifies UtopiaFIFO an entire cell is available for transfer. It is
an input signal. Tx mode: CLAVR notifies sending agent the UtopiaFIFO can accept an entire cell. It is an output signal.
Cell Available (FIFO-c)—Receive side. Rx mode: CLAVR notifies UtopiaFIFO an entire cell is available for transfer.
It is an input signal. Tx mode: CLAVR notifies sending agent the UtopiaFIFO can accept an entire cell. It is an
output signal.
Cell Available (FIFO-d)—Receive side. Rx mode: CLAVR notifies UtopiaFIFO an entire cell is available for transfer.
It is an input signal. Tx mode: CLAVR notifies sending agent the UtopiaFIFO can accept an entire cell. It is an
output signal.
Cell Available (sender side). Notifies controlling agent a cell is available.
Cell Ready, FIFO-n. For OE LOW and RST HIGH, CR-n is an output (HIGH if FIFO-n has a cell available, LOW if
no cell available). For RST and OE both HIGH, CR-n are tri-stated. For RST LOW and OE HIGH, CRn are inputs.
See Table 1.
Cell Ready Composite. For OE LOW and RST HIGH, CRC is an output (HIGH if any FIFO has cell available). For
Cell Size selection for (MSB-2).
End Cell Transfer. For OE LOW and RST HIGH, ECT is an output asserted one cycle before end of current cell
and OE HIGH, ECT is a cell size selection input [MSB-1].
Enable (FIFO-a)—Receive Side. Rx mode: ENR is an output initiating data transfer to the receiver (input) side.
Enable (FIFO-b)—Receive Side. Rx mode: ENR is an output initiating data transfer to the receiver (input) side.
Enable (FIFO-c)—Receive Side. Rx mode: ENR is an output initiating data transfer to the receiver (input) side.
Enable (FIFO-d)—Receive Side. Rx mode: ENR is an output initiating data transfer to the receiver (input) side.
Enable (sender side). Enables current word transfer. Rx mode: an input to UtopiaFIFO. Tx mode: an output to
receiving system.
Logic and supply ground.
RST and OE both HIGH, CRC is tri-stated. For RST LOW AND OE HIGH, CRC is a cell size selection input [MSB].
9-bit data bus inputs for FIFO-a.
9-bit data bus inputs for FIFO-b.
9-bit data bus inputs for FIFO-c.
9-bit data bus inputs for FIFO-d.
transfer. ECT goes LOW upon cell transfer completion. For RST and OE both HIGH, ECT is tri-stated. For RST LOW
Tx mode: ENR is an input initiating data transfer to the receiver side.
Tx mode: ENR is an input initiating data transfer to the receiver side.
Tx mode: ENR is an input initiating data transfer to the receiver side.
Tx mode: ENR is an input initiating data transfer to the receiver side.
3
Description
Commercial and Industrial Temperature Ranges
3206 tbl 01