PEB20570FV31XP Infineon Technologies, PEB20570FV31XP Datasheet - Page 116

• Manufacturer Part Number: PEB20570FV31XP
• Manufacturer: Infineon Technologies

Specifications of PEB20570FV31XP

• Lead Free Status / Rohs Status: Compliant

A buffer-swapping takes place at the end of frame-n, as at the end of any other frame.
This means that during frame-n+1, buffer-1 is used as I-buffer, while buffer-0 is used as
D-buffer. During this frame the IOMU handles the incoming and outgoing frames n+1,
and writes/reads the time-slots to/from buffer-1 input/output blocks. In parallel, the DSP
handles buffer-0 input and output blocks. It reads the frame-n up-stream time-slots from
the input-blocks and prepares the frame-n+2 down-stream time-slots in the output
blocks. The buffer-swapping at the end of frame-n+1 re-assigns buffer-0 as the I-buffer
and buffer-1 as the D-buffer (exactly as in frame-n).
Figure 35
frames, as described in the previous example.
Figure 35
Data Sheet
frame n
written by the
IOMU, from
DU
frame n
read by the
IOMU, to DD
frame n-1
read by the
DSP
frame n+1
written by the
DSP
illustrates the frame-wise circular-buffering scheme during two consecutive
The Circular-Buffer During two Consecutive Frames
FRAME n
Used as I-buffer
Used as D-buffer
BUFFER 0
BUFFER 1
in0
in1
out0
out1
in0
in1
out0
out1
99
frame n
read by the
DSP
frame n+2
written by the
DSP
frame n+1
written by the
IOMU, from
DU
frame n+1
read by the
IOMU, to DD
SWAP
FRAME n+1
Functional Description
Used as D-buffer
Used as I-buffer
BUFFER 0
BUFFER 1
in0
in1
out0
out1
in0
in1
out0
out1
PEB 20570
PEB 20571
2003-07-31