PEF2054NV21XK Infineon Technologies, PEF2054NV21XK Datasheet - Page 133
PEF2054NV21XK
Manufacturer Part Number
PEF2054NV21XK
Description
Manufacturer
Infineon Technologies
Datasheet
1.PEF2054NV21XK.pdf
(269 pages)
Specifications of PEF2054NV21XK
Lead Free Status / Rohs Status
Compliant
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Figure 48
Time Slot Encoding for the Different PCM and CFI Modes
Memory Access Time
Writing to MACR starts a memory write or read operation which takes a certain time.
During this time no further memory accesses may be performed i.e. the MADR, MAAR,
and MACR registers may not be written. The STAR:MAC bit indicates whether a memory
operation is still in progress (MAC = 1) or already completed (MAC = 0) and should
therefore be interrogated before each access.
Semiconductor Group
CFI Mode 0
PCM Mode 0
4 Duplex Ports
32 Tume-Slots/Port
CFI Mode 1
2 Duplex Ports
64 Time-Slots/Port
PCM Mode 1
2 Duplex Ports
64 Time-Slots/Port
CFI Mode 2
PCM Mode 2
1 Duplex Port
128 Time-Slots/Port
CFI Mode 3
8 Bidirectional Ports
16 Time-Slots/Port
U/D : (1) / Downstream (0)
U/D
U/D
U/D
U/D
U/D
Time-Slot# (0-15)
Time-Slot# (0-31)
Time-Slot# (0-63)
133
Time-Slot# (0-63)
Time-Slot# (0-127)
Port# (0-1)
Port# (0-3)
Port# (0-3)
Port# (0-1)
ITD08063
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