PEB20571FV31XT Lantiq, PEB20571FV31XT Datasheet - Page 183
PEB20571FV31XT
Manufacturer Part Number
PEB20571FV31XT
Description
Manufacturer
Lantiq
Datasheet
1.PEB20571FV31XT.pdf
(308 pages)
Specifications of PEB20571FV31XT
Lead Free Status / Rohs Status
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Note: Unused bits (x) read as ‘0’. The registers are reset upon every 8 kHz frame sync
Data Sheet
to avoid multiple data transmit/receive to/from the VIP.
1 =
The DSP reads the VIP register (during initialization,
debugging or error conditions). The register value is available
for the read operation in the consecutive frame (after the next
FSC).
Note: To avoid blocking, the DSP must not issue this bit during
normal operation.
166
Register Description
PEB 20570
PEB 20571
2003-07-31
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