PEB20571FV31XT Lantiq, PEB20571FV31XT Datasheet - Page 193
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PEB20571FV31XT
Manufacturer Part Number
PEB20571FV31XT
Description
Manufacturer
Lantiq
Datasheet
1.PEB20571FV31XT.pdf
(308 pages)
Specifications of PEB20571FV31XT
Lead Free Status / Rohs Status
Compliant
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6.2.1.9
SCSTA Register
Reset value: undefined
SCSTA0
SCSTA1
Note: Scrambling and descrambling will only work correctly if (in the initialization phase)
Data Sheet
bit 8 of the OAK register ST2 is set to ’1’ (See “GHDLCU Frame Frequency” on
page 213.)
15
x
7
x
Scrambler Status Register
Descrambler Status
0 =
1 =
Scrambler Status (only valid if bit SCMOD2 = 1)
0 =
1 =
14
x
6
x
Write access: start of descrambling algorithm for all channels
enabled in the HRAM (only valid if bit SCMOD2 = 1!)
read access: descrambler is processing data
Write access: start of scrambling algorithm for all channels enabled
in the HRAM
read access: descrambling is finished
read access: scrambler is processing data
read access: scrambling is finished
13
5
x
x
12
4
x
x
read/write
176
11
3
x
x
10
2
x
x
Register Description
SCSTA1 SCSTA0
Address: D011
9
1
x
PEB 20570
PEB 20571
2003-07-31
8
x
0
H
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