PEB20571FV31XT Lantiq, PEB20571FV31XT Datasheet - Page 249
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PEB20571FV31XT
Manufacturer Part Number
PEB20571FV31XT
Description
Manufacturer
Lantiq
Datasheet
1.PEB20571FV31XT.pdf
(308 pages)
Specifications of PEB20571FV31XT
Lead Free Status / Rohs Status
Compliant
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6.2.11
6.2.11.1 PDC Control Register
PDC Control Register (CPDC)
Reset value: 0000
Note: ’x’ = unused bits, read as 0
.
PDC(1:0) PDC Frequency Selection (Only in Master Mode when PDC is output)
Data Sheet
15
7
x
x
Clock Generator Register Description
00 =
01 =
10 =
11 =
H
14
6
x
x
PDC = 2.048 MHz (default)
PDC = 4.096 MHz
PDC = 8.192 MHz
PDC = 16.384 MHz
13
5
x
x
12
4
read/write
x
x
232
11
3
x
x
10
2
x
x
Register Description
Address: D080
9
x
1
PDC(1:0)
PEB 20570
PEB 20571
2003-07-31
8
0
x
H
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