PEB20571FV31XT Lantiq, PEB20571FV31XT Datasheet - Page 289
PEB20571FV31XT
Manufacturer Part Number
PEB20571FV31XT
Description
Manufacturer
Lantiq
Datasheet
1.PEB20571FV31XT.pdf
(308 pages)
Specifications of PEB20571FV31XT
Lead Free Status / Rohs Status
Compliant
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Figure 82
Table 81
Parameter
DCL_2000 Clock Period
DCL_2000 Duty Cycle
Note: Usually DSP-clock is generated internally by the internal PLL, in a frequency of
Data Sheet
DCL_2000
FSC
FSC-Short
61.44 MHz. If on the other hand a lower frequency clcok is provided via CLK_DSP
input pin, the selected frequency of DCL_2000 should not exceed the frequency
of DSP-clock-frequency / 4 (DSP clcok frequency devided by 4), in order to
guarantee a proper operation of the DELIC.
FSC Timing IOM-2000
DCL_2000 (IOM-2000 Data Clock) Timing
t
t
FRE
FRE
Symbo
l
t
t
DCP
DDC
t
FFF
Electrical Characteristics and Timing Diagrams
min. typ. max.
48
Limit Values
272
325
162
81
52
t
t
FCD
FCD
t
FFE
Unit Notes
ns
ns
ns
%
DCL_2000 = 3072 kHz
DCL_2000 = 6144 kHz
DCL_2000 = 12288 kHz
PEB 20570
PEB 20571
2003-07-31
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