ANXL1250FYC3F AMD (ADVANCED MICRO DEVICES), ANXL1250FYC3F Datasheet - Page 27

• Manufacturer Part Number: ANXL1250FYC3F
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ANXL1250FYC3F

• Lead Free Status / Rohs Status: Compliant

Signal Definitions
2.3.4
2.3.5
AMD Geode™ NX Processors Data Book
Signal Name
SFILLVALID#
SADDIN[14:2]#
SADDINCLK#
SADDOUT[14:2]#
SADDOUTCLK#
SADDIN[1:0]#
SADDOUT[1:0]#
Signal Name
PICCLK
PICD[1:0]#
AMD Processor System Bus Interface Signals (continued)
APIC Interface Signals
See Table
See Table
page 23
page 23
Pin No.
Pin No.
N5, N3
2-2 on
2-2 on
J3, J1
AL29,
AJ31
AJ33
AJ29
E3
N1
Port
Port
B
I
I
I
I
I
I
Description
System Bus Fill Valid. When asserted, validates the current mem-
ory or I/O data transfer into the processor. The system can tie this
pin to the asserted state (validating all fills), or use it to enable or
cancel fills as they progress. The processor can sample
SFILLVALID# at D0 or D1 (that is, the first or second data beat).
System Address Inputs. The unidirectional system address and
command interface into the processor from the system. It is used to
transfer probes or data movement commands into the processor. All
probes and commands on SADDIN[14:2]# are skewed-aligned with
the forward clock, SADDINCLK#.
System Address Input Clock. The single-ended forwarded clock
for SADDIN[14:2]# driven by the system. Both rising and falling
edges are used to transfer probes or commands.
System Address Outputs. The unidirectional system address
interface from the processor to the system. It is used to transfer pro-
cessor commands or probe responses to the system. All commands
on SADDOUT[14:0#] are skewed-aligned with the forward clock
SADDOUTCLK#.
System Address Output Clock. The single-ended forwarded clock
for SADDOUT[14:2]# driven by the processor. Both rising and fall-
ing edges are used to transfer commands or probe responses.
System Address Inputs and Outputs bits 1 and 0. The NX pro-
cessor does not support SADDIN[1:0]# or SADDOUT[1:0]#. SAD-
DIN[1]# is tied to V
supported by the Northbridge. SADDOUT[1:0]# are tied to V
pull-up resistors if these pins are supported by the Northbridge. For
more information, see the AMD Athlon™ Processor System Bus
Specification (publication ID 21902).
Description
APIC Clock and Interrupts. The Advanced Programmable Inter-
rupt Controller (APIC) feature provides a flexible and expandable
means of delivering interrupts in a system using an AMD processor.
PICD[1:0]# are the bidirectional message passing signals used for
the APIC and are driven to the Southbridge or a dedicated I/O APIC.
PICCLK must be driven with a valid clock input.
Refer to VCC_2.5V Generation Circuit, found in the section, “Moth-
erboard Required Circuits” of the AMD Athlon™ Processor-Based
Motherboard Design Guide (publication ID 24363) for the required
supporting circuity.
For more information, see Table 5-8 "PICD[1:0]# and PICCLK (APIC
Pins) DC Characteristics" on page 52.
CC
with pull-up resistors, if this bit is not
31177H
CC
with
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