MT47H32M16BN-25:D Micron Technology Inc, MT47H32M16BN-25:D Datasheet - Page 103

• Manufacturer Part Number: MT47H32M16BN-25:D
• Manufacturer: Micron Technology Inc
• Type: DDR2 SDRAMr

Specifications of MT47H32M16BN-25:D

• Organization: 32Mx16
• Density: 512Mb
• Address Bus: 15b
• Access Time (max): 400ps
• Maximum Clock Rate: 800MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: FBGA
• Operating Temp Range: 0C to 85C
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 295mA
• Pin Count: 84
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Compliant

Figure 53: READ-to-PRECHARGE – BL = 4
Figure 54: READ-to-PRECHARGE – BL = 8
PDF: 09005aef82f1e6e2
Rev. M 9/08 EN
Notes:
Notes:
not be issued until
the access of the last data elements.
Examples of READ-to-PRECHARGE for BL = 4 are shown in Figure 53 (page 103) and in
Figure 54 (page 103) for BL = 8. The delay from READ-to-PRECHARGE period to the
same bank is AL + BL/2 - 2CK + MAX (
of the two.
DQS, DQS#
DQS, DQS#
Command
Command
Address
Address
1. RL = 4 (AL = 1, CL = 3); BL = 4.
2.
3. Shown with nominal
1. RL = 4 (AL = 1, CL = 3); BL = 8.
2.
3. Shown with nominal
CK#
A10
DQ
CK#
A10
CK
DQ
CK
t
t
RTP ≥ 2 clocks.
RTP ≥ 2 clocks.
Bank a
Bank a
READ
READ
T0
T0
AL + BL/2 - 2CK + MAX ( t RTP/ t CK or 2CK)
AL = 1
AL = 1
First 4-bit
prefetch
prefetch
NOP
AL + BL/2 - 2CK + MAX ( t RTP/ t CK or 2CK)
4-bit
T1
≥ t RAS (MIN)
NOP
T1
t
RP is met. However, part of the row precharge time is hidden during
≥t RAS (MIN)
≥ t RTP (MIN)
NOP
T2
t
t
AC,
AC,
NOP
CL = 3
T2
103
Second 4-bit
t
t
DQSCK, and
DQSCK, and
CL = 3
prefetch
≥ t RC (MIN)
≥t RC (MIN)
NOP
T3
Bank a
Valid
PRE
T3
≥t RTP (MIN)
t
RTP/
Micron Technology, Inc. reserves the right to change products or specifications without notice.
NOP
T4
t
DO
t
DQSQ.
DQSQ.
512Mb: x4, x8, x16 DDR2 SDRAM
NOP
t
T4
CK or 2 × CK) where MAX means the larger
≥ t RP (MIN)
DO
DO
Bank a
Valid
PRE
T5
DO
DO
NOP
T5
Transitioning Data
Transitioning Data
DO
DO
NOP
T6
≥t RP (MIN)
DO
DO
Bank a
Valid
ACT
T6
DO
© 2004 Micron Technology, Inc. All rights reserved.
NOP
T7
DO
Don’t Care
Don’t Care
DO
NOP
T7
Bank a
Valid
ACT
T8
READ