MT47H32M16BN-25:D Micron Technology Inc, MT47H32M16BN-25:D Datasheet - Page 46

no-image

MT47H32M16BN-25:D

Manufacturer Part Number
MT47H32M16BN-25:D
Description
Manufacturer
Micron Technology Inc
Type
DDR2 SDRAMr
Datasheet

Specifications of MT47H32M16BN-25:D

Organization
32Mx16
Density
512Mb
Address Bus
15b
Access Time (max)
400ps
Maximum Clock Rate
800MHz
Operating Supply Voltage (typ)
1.8V
Package Type
FBGA
Operating Temp Range
0C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
295mA
Pin Count
84
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT47H32M16BN-25:D
Manufacturer:
MICRON
Quantity:
528
Part Number:
MT47H32M16BN-25:D TR
Manufacturer:
Micron Technology Inc
Quantity:
10 000
AC and DC Operating Conditions
Table 12: Recommended DC Operating Conditions (SSTL_18)
All voltages referenced to Vss
PDF: 09005aef82f1e6e2
Rev. M 9/08 EN
Parameter
Supply voltage
VddL supply voltage
I/O supply voltage
I/O reference voltage
I/O termination voltage (system)
Notes:
46. ODT turn-on time
47. ODT turn-off time
48. Half-clock output parameters must be derated by the actual
49. The -187E maximum limit is 2 ×
50. Should use 8
1. Vdd and VddQ must track each other. VddQ must be ≤ Vdd.
2. VssQ = VssL = Vss.
3. VddQ tracks with Vdd; VddL tracks with Vdd.
4. Vref is expected to equal VddQ/2 of the transmitting device and to track variations in
5. Vtt is not applied directly to the device. Vtt is a system supply for signal termination
duty cycle was 47/53,
+ 0.03, or 2.53, for
gins to turn on. ODT turn-on time
Both are measured from
turn off time
input clock jitter is present; this will result in each parameter becoming larger. The pa-
rameter
t
t
3 x
the DC level of the same. Peak-to-peak noise (noncommon mode) on Vref may not ex-
ceed ±1 percent of the DC value. Peak-to-peak AC noise on Vref may not exceed ±2
percent of Vref(DC). This measurement is to be taken at the nearest Vref bypass capacitor.
resistors, is expected to be set equal to Vref, and must track variations in the DC level of
Vref.
JITdty (MAX). The parameter
ERR
t
CK +
5per
Vref(DC)
Symbol
(MIN) and
t
AOF (MIN) is required to be derated by subtracting both
t
VddQ
VddL
AC (MAX) + 1,000 in the future.
Vdd
Vtt
t
t
CK for backward compatibility.
AOF (MAX) is when the bus is in High-Z. Both are measured from
t
t
t
t
AON (MIN) is when the device leaves High-Z and ODT resistance be-
AOF (MIN) is when the device starts to turn off ODT resistance. ODT
AOF (MAX).
JITdty (MIN).
Vref(DC) - 40
0.49 × VddQ
t
AOFD would actually be 2.5 - 0.03, or 2.47, for
Min
t
1.7
1.7
1.7
AOND.
46
t
AOF (MAX) is required to be derated by subtracting both
t
CK +
t
AON (MAX) is when the ODT resistance is fully on.
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t
0.50 × VddQ
AC (MAX) + 1,000 but it will likely be
Vref(DC)
512Mb: x4, x8, x16 DDR2 SDRAM
AC and DC Operating Conditions
Nom
1.8
1.8
1.8
Vref(DC) + 40
0.51 × VddQ
Max
1.9
1.9
1.9
t
© 2004 Micron Technology, Inc. All rights reserved.
ERR
5per
t
ERR
t
and
AOF (MIN) and 2.5
5per
Units
mV
t
JITdty when
V
V
V
V
(MAX) and
t
AOFD.
Notes
1, 2
2, 3
2, 3
4
5

Related parts for MT47H32M16BN-25:D