MT47H64M16HR-3 IT:HTR Micron Technology Inc, MT47H64M16HR-3 IT:HTR Datasheet - Page 11

• Manufacturer Part Number: MT47H64M16HR-3 IT:HTR
• Manufacturer: Micron Technology Inc
• Type: DDR2 SDRAMr

Specifications of MT47H64M16HR-3 IT:HTR

• Organization: 64Mx16
• Density: 1Gb
• Address Bus: 16b
• Access Time (max): 450ps
• Maximum Clock Rate: 667MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: FBGA
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 135mA
• Pin Count: 84
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Compliant

Automotive Temperature
General Notes
PDF: 09005aef821ae8bf
1GbDDR2.pdf – Rev. W 7/11 EN
The automotive temperature (AT) option, if offered, has two simultaneous require-
ments: ambient temperature surrounding the device cannot be less than –40°C or great-
er than 105°C, and the case temperature cannot be less than –40°C or greater than
105°C. JEDEC specifications require the refresh rate to double when T
this also requires use of the high-temperature self refresh option. Additionally, ODT re-
sistance the input/output impedance and I
or > 85°C.
• The functionality and the timing specifications discussed in this data sheet are for the
• Throughout the data sheet, the various figures and text refer to DQs as “DQ.” The DQ
• A x16 device's DQ bus is comprised of two bytes. If only one of the bytes needs to be
• Complete functionality is described throughout the document, and any page or dia-
• Any specific requirement takes precedence over a general statement.
DLL-enabled mode of operation.
term is to be interpreted as any and all DQ collectively, unless specifically stated oth-
erwise. Additionally, the x16 is divided into 2 bytes: the lower byte and the upper byte.
For the lower byte (DQ[7:0]), DM refers to LDM and DQS refers to LDQS. For the up-
per byte (DQ[15:8]), DM refers to UDM and DQS refers to UDQS.
used, use the lower byte for data transfers and terminate the upper byte as noted:
– Connect UDQS to ground via 1k * resistor
– Connect UDQS# to V
– Connect UDM to V
– Connect DQ[15:8] individually to either V
*If ODT is used, 1k resistor should be changed to 4x that of the selected ODT.
gram may have been simplified to convey a topic and may not be inclusive of all re-
quirements.
DQ[15:8].
DD
DD
via 1k * resistor
via 1k * resistor
11
Micron Technology, Inc. reserves the right to change products or specifications without notice.
DD
SS
values must be derated when T
1Gb: x4, x8, x16 DDR2 SDRAM
or V
DD
via 1k * resistors, or float
Functional Description
‹ 2007 Micron Technology, Inc. All rights reserved.
C
exceeds 85°C;
C
is < 0°C