MT47H64M16HR-3 IT:HTR Micron Technology Inc, MT47H64M16HR-3 IT:HTR Datasheet - Page 7
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MT47H64M16HR-3 IT:HTR
Manufacturer Part Number
MT47H64M16HR-3 IT:HTR
Description
Manufacturer
Micron Technology Inc
Type
DDR2 SDRAMr
Specifications of MT47H64M16HR-3 IT:HTR
Organization
64Mx16
Density
1Gb
Address Bus
16b
Access Time (max)
450ps
Maximum Clock Rate
667MHz
Operating Supply Voltage (typ)
1.8V
Package Type
FBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
135mA
Pin Count
84
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Compliant
1Gb: x4, x8, x16 DDR2 SDRAM
Features
Figure 51: READ-to-PRECHARGE – BL = 8 ..................................................................................................... 100
Figure 52: Bank Read – Without Auto Precharge ............................................................................................. 102
Figure 53: Bank Read – with Auto Precharge .................................................................................................. 103
t
t
Figure 54: x4, x8 Data Output Timing –
DQSQ,
QH, and Data Valid Window .................................................. 104
t
t
Figure 55: x16 Data Output Timing –
DQSQ,
QH, and Data Valid Window ..................................................... 105
t
t
Figure 56: Data Output Timing –
AC and
DQSCK ......................................................................................... 106
Figure 57: Write Burst ................................................................................................................................... 108
Figure 58: Consecutive WRITE-to-WRITE ...................................................................................................... 109
Figure 59: Nonconsecutive WRITE-to-WRITE ................................................................................................ 109
Figure 60: WRITE Interrupted by WRITE ....................................................................................................... 110
Figure 61: WRITE-to-READ ........................................................................................................................... 111
Figure 62: WRITE-to-PRECHARGE ................................................................................................................ 112
Figure 63: Bank Write – Without Auto Precharge ............................................................................................ 113
Figure 64: Bank Write – with Auto Precharge .................................................................................................. 114
Figure 65: WRITE – DM Operation ................................................................................................................ 115
Figure 66: Data Input Timing ........................................................................................................................ 116
Figure 67: Refresh Mode ............................................................................................................................... 117
Figure 68: Self Refresh .................................................................................................................................. 119
Figure 69: Power-Down ................................................................................................................................ 121
Figure 70: READ-to-Power-Down or Self Refresh Entry .................................................................................. 123
Figure 71: READ with Auto Precharge-to-Power-Down or Self Refresh Entry ................................................... 123
Figure 72: WRITE-to-Power-Down or Self Refresh Entry ................................................................................. 124
Figure 73: WRITE with Auto Precharge-to-Power-Down or Self Refresh Entry .................................................. 124
Figure 74: REFRESH Command-to-Power-Down Entry .................................................................................. 125
Figure 75: ACTIVATE Command-to-Power-Down Entry ................................................................................. 125
Figure 76: PRECHARGE Command-to-Power-Down Entry ............................................................................. 126
Figure 77: LOAD MODE Command-to-Power-Down Entry ............................................................................. 126
Figure 78: Input Clock Frequency Change During Precharge Power-Down Mode ............................................ 127
Figure 79: RESET Function ........................................................................................................................... 129
Figure 80: ODT Timing for Entering and Exiting Power-Down Mode ............................................................... 131
Figure 81: Timing for MRS Command to ODT Update Delay .......................................................................... 132
Figure 82: ODT Timing for Active or Fast-Exit Power-Down Mode .................................................................. 132
Figure 83: ODT Timing for Slow-Exit or Precharge Power-Down Modes .......................................................... 133
Figure 84: ODT Turn-Off Timings When Entering Power-Down Mode ............................................................ 133
Figure 85: ODT Turn-On Timing When Entering Power-Down Mode .............................................................. 134
Figure 86: ODT Turn-Off Timing When Exiting Power-Down Mode ................................................................ 135
Figure 87: ODT Turn-On Timing When Exiting Power-Down Mode ................................................................. 136
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1GbDDR2.pdf – Rev. W 7/11 EN