BOXD865GLCL Intel, BOXD865GLCL Datasheet - Page 123

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BOXD865GLCL

Manufacturer Part Number
BOXD865GLCL
Description
Manufacturer
Intel
Datasheet

Specifications of BOXD865GLCL

Lead Free Status / Rohs Status
Supplier Unconfirmed
Table 67.
Notes:
1.
2.
3.
4.
Feature
CPC Override
SDRAM Timing Control
(Note 1)
SDRAM RAS Active to
Precharge
SDRAM CAS# Latency
(Note 4)
SDRAM RAS# to CAS#
Delay
SDRAM RAS#
Precharge
This feature is displayed only if Extended Configuration is set to User Defined.
This option is displayed only if the installed processor has a 533 MHz system bus.
This option is displayed only if the installed processor has an 800 MHz system bus.
This feature is displayed only if SDRAM Timing Control is set to Manual – User Defined.
(Note 4)
(Note 4)
(Note 4)
Chipset Configuration Submenu (continued)
Options
Auto (default)
Enabled
Disabled
Auto (default)
Manual – Aggressive
Manual – User Defined
8
7
6 (default)
5
2.0
2.5 (default)
3.0
4
3 (default)
2
4
3 (default)
2
Description
Controls the CPC/1n rule mode.
Enabled allows the DRAM controller to attempt chip
select assertions in two consecutive common clocks.
Auto = Timings will be programmed according to the
memory detected.
Manual – Aggressive = Selects most aggressive
user-defined timings.
Manual – User Defined = Allows manual override of
detected SDRAM settings.
Corresponds to tRAS.
Selects the number of clock cycles required to
address a column in memory.
Selects the number of clock cycles between
addressing a row and addressing a column.
Selects the length of time required before accessing
a new row.
BIOS Setup Program
123