BOXD865GLCL Intel, BOXD865GLCL Datasheet - Page 62

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BOXD865GLCL

Manufacturer Part Number
BOXD865GLCL
Description
Manufacturer
Intel
Datasheet

Specifications of BOXD865GLCL

Lead Free Status / Rohs Status
Supplier Unconfirmed
Intel Desktop Board D865GBF/D865GLC Technical Product Specification
2.4 Fixed I/O Map
62
Table 21.
Notes:
1.
2.
3.
Some additional I/O addresses are not available due to ICH5 address aliassing. The ICH5 data
sheet provides more information on address aliassing.
NOTE
0228 - 022F
04D0 - 04D1
Address (hex)
0000 - 00FF
0170 - 0177
01F0 - 01F7
0278 - 027F
02E8 - 02EF
02F8 - 02FF
0374 - 0377
0378 - 037F
03B0 - 03BB
03C0 - 03DF
03E8 - 03EF
03F0 - 03F5
03F4 - 03F7
03F8 - 03FF
LPTn + 400
0CF8 - 0CFB
0CF9
0CFC - 0CFF
FFA0 - FFA7
FFA8 - FFAF
For information about
Obtaining the ICH5 data sheet
Default, but can be changed to another address range
Dword access only
Byte access only
(Note 3)
I/O Map
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 2)
8 bytes
4 bytes
Size
256 bytes
8 bytes
8 bytes
8 bytes
8 bytes
8 bytes
8 bytes
12 bytes
32 bytes
8 bytes
6 bytes
4 bytes
8 bytes
2 bytes
8 bytes
4 bytes
1 byte
4 bytes
8 bytes
8 bytes
Description
Used by the Desktop Board D865GBF/D865GLC. Refer to
the ICH5 data sheet for dynamic addressing information.
Secondary Parallel ATE IDE channel command block
Primary Parallel ATE IDE channel command block
LPT3
LPT2
COM4
COM2
Secondary Parallel ATA IDE channel control block
LPT1
Intel 82865G GMCH
Intel 82865G GMCH
COM3
Diskette channel
Primary Parallel ATA IDE channel control block
COM1
Edge/level triggered PIC
ECP port, LPTn base address + 400h
PCI configuration address register
Reset control register
PCI configuration data register
Primary Parallel ATA IDE bus master registers
Secondary Parallel ATA IDE bus master registers
Refer to
Section 1.3 on page 17