TC59LM818DMBI-37 Toshiba, TC59LM818DMBI-37 Datasheet - Page 36

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TC59LM818DMBI-37

Manufacturer Part Number
TC59LM818DMBI-37
Description
Manufacturer
Toshiba
Type
DDR FCRAMr
Datasheet

Specifications of TC59LM818DMBI-37

Organization
16Mx18
Density
288Mb
Address Bus
17b
Access Time (max)
650ps
Maximum Clock Rate
533MHz
Operating Supply Voltage (typ)
2.5V
Package Type
BGA
Operating Temp Range
-40C to 100C
Operating Supply Voltage (max)
2.625V
Operating Supply Voltage (min)
2.375V
Supply Current
420mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Not Compliant
Unidirectional DS/QS mode
Unidirectional DS/Free Running QS mode
Bank Add.
BL = 2
BL = 4
BL = 2
BL = 4
Command
MULTIPLE BANK WRITE TIMING (CL = 6)
Address
(output)
(output)
(output)
(output)
(input)
(input)
(input)
(input)
(input)
(input)
(input)
(input)
CLK
CLK
DQ
DQ
DQ
DQ
QS
QS
QS
QS
DS
DS
DS
DS
Note: l
WRA
Bank
UA
"a"
0
I
RBD
Low
Low
RC
= 2 cycles
to the same bank must be satisfied.
LAL
LA
1
WRA
Bank
UA
I
"b"
RC
2
(Bank"a") = 7 cycles
WL = 5
WL = 5
WL = 5
WL = 5
LAL
LA
3
I
RC
4
(Bank"b") = 7 cycles
DESL
WL = 5
WL = 5
WL = 5
WL = 5
5
Da0Da1Da2Da3Db0Db1Db2Db3
Da0Da1Da2Da3Db0Db1Db2Db3
Da0Da1
Da0Da1
6
I
WRA
Bank
RBD
UA
"a"
7
= 2 cycles I
LAL
Db0Db1
Db0Db1
LA
8
WRA
Bank
UA
"b"
9
RBD
= 2 cycles I
LAL
LA
10
WRA
Bank
TC59LM818DMBI-37
UA
"c"
11
RBD
LAL
2005-03-07 36/55
= 2 cycles I
LA
12
WRA
Bank
Da0 Da1
Da0 Da1
Da0 Da1 Da2Da3Db0Db1
UA
Da0 Da1 Da2Da3Db0Db1
"d"
13
RBD
LAL
14
LA
= 2 cycles
Rev 1.2
WRA
Bank
Db0Db1
Db0Db1
UA
"a"
15

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