XC56309AG100A Freescale Semiconductor, XC56309AG100A Datasheet - Page 26

• Manufacturer Part Number: XC56309AG100A
• Description: IC DSP 24BIT 100MHZ 144-TQFP
• Manufacturer: Freescale Semiconductor
• Series: DSP563xxr
• Type: Fixed Pointr

Specifications of XC56309AG100A

• Interface: Host Interface, SSI, SCI
• Clock Rate: 100MHz
• Non-volatile Memory: ROM (576 B)
• On-chip Ram: 24kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Signals/Connections
2-2
Note:
AA0/RAS0–
PINIT/NMI
AA3/RAS3
CLKOUT
1.
2.
3.
4.
D[0–23]
A[0–17]
GND
EXTAL
GND
GND
GND
GND
GND
GND
GND
PCAP
V
BCLK
BCLK
V
V
V
V
V
V
XTAL
CAS
CCQ
CCD
CCC
CCH
CCP
CCA
CCS
WR
BG
The HI08 port supports a non-multiplexed or a multiplexed bus, single or double Data Strobe (DS), and single or
double Host Request (HR) configurations. Since each mode is configured independently, any combination of these
modes is possible. These HI08 signals can also be configured as GPIO signals (PB[0–15]). Signals with dual
designations (for example,
The ESSI0, ESSI1, and SCI signals are multiplexed with the Port C GPIO signals (PC[0–5]), Port D GPIO signals
(PD[0–5]), and Port E GPIO signals (PE[0–2]), respectively.
TIO[0–2] can be configured as GPIO signals.
The GND signals are listed for the 144-pin TQFP package. For the 196-ball MAP-BGA package, all grounds except
GND
BR
RD
BB
TA
P1
Q
P
A
D
C
H
S
P
and GND
2
4
2
2
4
4
4
2
4
4
18
24
4
Figure 2-1. Signals Identified by Functional Group
Power Inputs:
PLL
Internal Logic
Address Bus
Data Bus
Bus Control
HI08
ESSI/SCI/Timer
Grounds
PLL
PLL
Internal Logic
Address Bus
Data Bus
Bus Control
HI08
ESSI/SCI/Timer
Clock
Port A
External
Address Bus
External
Data Bus
External
Bus
Control
PLL
P1
are connected toegether and referenced as GND. There are 64 GND connections.
4
:
HAS
DSP56309
DSP56309 User’s Manual, Rev. 1
/HAS) have configurable polarity.
Interface (SCI) Port
Synchronous Serial
Synchronous Serial
Communications
Interface Port 1
Interface Port
JTAG/OnCE
(HI08) Port
Enhanced
Enhanced
Interrupt/
(ESSI0)
(ESSI1)
Interface
Timers
Control
Serial
Mode
Host
Port
1
0
2
2
2
3
3
3
8
TIO0
TIO1
TIO2
MODA
MODB/IRQB
MODC/IRQC
MODD/IRQD
RESET
Non-Multiplexed
Bus
H[0–7]
HA0
HA1
HA2
HCS
Single DS
HRW
HDS
Single HR
HREQ/HREQ
HACK/HACK
SC0[0–2]
SCK0
SRD0
STD0
SC1[0–2]
SCK1
SRD1
STD1
RXD
TXD
SCLK
TCK
TDI
TDO
TMS
TRST
DE
/
/HDS
HCS
/
IRQA
Port C GPIO
PC[0–2]
PC3
PC4
PC5
Port D GPIO
PD[0–2]
PD3
PD4
PD5
Port E GPIO
PE0
PE1
PE2
Timer GPIO
TIO0
TIO1
TIO2
Multiplexed
Bus
HAD[0–7]
HAS
HA8
HA9
HA10
Double DS
HRD
HWR/HWR
Double HR
HTRQ/HTRQ
HRRQ/HRRQ
/
/HAS
HRD
Freescale Semiconductor
Port B
GPIO
PB[0–7]
PB8
PB9
PB10
PB13
PB11
PB12
PB14
PB15