XC56309AG100A Freescale Semiconductor, XC56309AG100A Datasheet - Page 48

• Manufacturer Part Number: XC56309AG100A
• Description: IC DSP 24BIT 100MHZ 144-TQFP
• Manufacturer: Freescale Semiconductor
• Series: DSP563xxr
• Type: Fixed Pointr

Specifications of XC56309AG100A

• Interface: Host Interface, SSI, SCI
• Clock Rate: 100MHz
• Non-volatile Memory: ROM (576 B)
• On-chip Ram: 24kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Memory Configuration
3.3 Y Data Memory Space
The Y data memory space consists of the following:
Note:
3.3.1 Internal Y Data Memory
The default internal Y data RAM is a 24-bit-wide, internal, static memory occupying the lowest
7 K ($0000–$1BFF) of Y memory space. The internal Y data RAM is organized into 28 banks
with 256 locations each. Available Y data memory space is decreased by 2 K through
reallocation of program memory using the memory switch mode described in the next section.
3.3.2 Memory Switch Modes—Y Data Memory
Memory switch mode reallocates of portions of X and Y data memory to internal program RAM.
Bit 7 in the OMR is the MS bit that controls this function, as follows:
3.3.3 External I/O Space—Y Data Memory
The off-chip peripheral registers should be mapped into the top 128 locations of Y data memory
($FFFF80–$FFFFFF in the 24-bit Address mode or $FF80–$FFFF in the 16-bit Address mode)
to take advantage of the Move Peripheral Data (MOVEP) instruction and the bit-oriented
instructions (BCHG, BCLR, BSET, BTST, BRCLR, BRSET, BSCLR, BSSET, JCLR, JSET,
JSCLR, and JSSET).
3-4
Internal Y data memory (7 K by default or 5 K)
External I/O space (upper 128 locations)
Optional off-chip memory expansion (up to 64 K in 16-bit mode, or 256 K in 24-bit mode
using the 18 external address lines, or 4 M using the external address lines and the four
address attribute lines). Refer to the DSP56300 Family Manual, especially Chapter 9,
External Memory Interface (Port A), for details on using the external memory interface to
access external Y data memory.
When the MS bit is cleared, the Y data memory consists of the default 7 K × 24-bit
memory space described in the previous section. In this default mode, the lowest external
Y data memory location is $1C00.
When the MS bit is set, a portion of the higher locations of X and Y data memory are
shifted to internal program RAM. The Y data memory in this mode consists of a
5 K × 24-bit memory space. In this mode, the lowest external Y data memory location is
$1400.
The Y memory space at $FF0000–$FFEFFF is reserved and should not be accessed.
DSP56309 User’s Manual, Rev. 1
Freescale Semiconductor